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AM3505

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Sitara-Prozessor: Arm Cortex-A8, Video-Frontend

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AM3505

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Produktdetails

CPU 1 Arm Cortex-A8 Frequency (MHz) 600 Graphics acceleration 1 3D Display type 1 LCD Protocols Ethernet Hardware accelerators Image video accelerator Operating system Linux, RTOS Security Cryptographic acceleration Rating Catalog Operating temperature range (°C) -40 to 105
CPU 1 Arm Cortex-A8 Frequency (MHz) 600 Graphics acceleration 1 3D Display type 1 LCD Protocols Ethernet Hardware accelerators Image video accelerator Operating system Linux, RTOS Security Cryptographic acceleration Rating Catalog Operating temperature range (°C) -40 to 105
BGA (ZER) 484 529 mm² 23 x 23 NFBGA (ZCN) 491 289 mm² 17 x 17
  • AM3517/05 Sitara Processor:
    • MPU Subsystem
      • 600-MHz Sitara ARM Cortex-A8 Core
      • NEON SIMD Coprocessor and Vector
        Floating-Point (FP) Coprocessor
    • Memory Interfaces:
      • 166-MHz 16- and 32-Bit mDDR/DDR2
        Interface with 1GB of Total Addressable
        Space
      • Up to 83 MHz General-Purpose Memory
        Interface Supporting 16-Bit-Wide
        Multiplexed Address/DataBus
      • 64KB of SRAM
      • 3 Removable Media Interfaces
        [MMC/SD/SDIO]
    • IO Voltage:
      • mDDR/DDR2 IOs: 1.8V
      • Other IOs: 1.8V and 3.3V
    • Core Voltage: 1.2V
    • Commercial and Extended Temperature Grade
      (operating restrictions apply)
    • 16-Bit Video Input Port Capable of
      Capturing HD Video
    • HD Resolution Display Subsystem
    • Serial Communication
      • High-End CAN Controller
      • 10/100 Mbit Ethernet MAC
      • USB OTG Subsystem with Standard
        DP/DM Interface [HS/FS/LS]
      • Multiport USB Host Subsystem [HS/FS/LS]
        • 12-Pin ULPI or 6-, 4-, or 3-Pin Serial
          Interface
      • Four Master and Slave Multichannel Serial
        Port Interface(McSPI) Ports
      • Five Multichannel Buffered Serial Ports (McBSPs)
        • 512-Byte Transmit and Receive Buffer
          (McBSP1/3/4/5)
        • 5-KB Transmit and Receive Buffer (McBSP2)
        • SIDETONE Core Support (McBSP2 and
          McBSP3 Only)For Filter, Gain, and Mix
          Operations
        • 128-Channel Transmit and Receive Mode
        • Direct Interface to I2S and PCM Device and
          TDM Buses
      • HDQ/1-Wire Interface
      • 4 UARTs (One with Infrared Data Association
        [IrDA] and Consumer Infrared [CIR] Modes)
      • 3 Master and Slave High-Speed Inter-Integrated
        Circuit (I2C) Controllers
      • Twelve 32-bit General-Purpose Timers
      • One 32-bit Watchdog Timer
      • One 32-bit 32-kHz Sync Timer
      • Up to 186 General-Purpose I/O (GPIO) Pins
  • Display Subsystem
    • Parallel Digital Output
    • Up to 24-Bit RGB
    • Supports Up to 2 LCD Panels
    • Support for Remote Frame Buffer Interface (RFBI)
      LCD Panels
    • Two 10-Bit Digital-to-Analog Converters (DACs)
      Supporting
      • Composite NTSC/PAL Video
      • Luma/Chroma Separate Video (S-Video)
    • Rotation of 90, 180, and 270 Degrees
    • Resize Images From 1/4x to 8x
    • Color Space Converter
    • 8-Bit Alpha Blending
  • Video Processing Front End (VPFE) 16-Bit Video Input Port
    • RAW Data Interface
    • 75-MHz Maximum Pixel Clock
    • Supports REC656/CCIR656 Standard
    • Supports YCbCr422 Format (8-Bit or 16-Bit with Discrete
      Horizontal and Vertical Sync Signals)
    • Generates Optical Black Clamping Signals
    • Built-in Digital Clamping and Black Level Compensation
    • 10-Bit to 8-Bit A-law Compression Hardware
    • Supports up to 16K Pixels (Image Size) in Horizontal
      and Vertical Directions
  • System Direct Memory Access (sDMA) Controller (32 Logical
    Channels with Configurable Priority)
  • Comprehensive Power, Reset, and Clock Management
  • ARM Cortex-A8 Memory Architecture
    • ARMv7 Architecture
      • In-Order, Dual-Issue, Superscalar Microprocessor Core
      • ARM NEON Multimedia Architecture
      • Over 2x Performance of ARMv6 SIMD
      • Supports Both Integer and Floating-Point SIMD
      • Jazelle RCT Execution Environment Architecture
      • Dynamic Branch Prediction with Branch Target Address
        Cache, Global History Buffer and 8-Entry Return Stack
      • Embedded Trace Macrocell [ETM] Support for
        Noninvasive Debug
      • 16KB of Instruction Cache (4-Way Set-Associative)
      • 16KB of Data Cache (4-Way Set-Associative)
      • 256KB of L2 Cache
    • PowerVR SGX Graphics Accelerator (AM3517 Only)
      • Tile-Based Architecture Delivering up to 10 MPoly/sec
      • Universal Scalable Shader Engine: Multi-threaded Engine
        Incorporating Pixel and Vertex Shader Functionality
      • Industry Standard API Support: OpenGLES 1.1 and
        2.0, OpenVG1.0
      • Fine-Grained Task Switching, Load Balancing, and
        Power Management
      • Programmable, High-Quality Image Anti-Aliasing
    • Endianess
      • ARM Instructions – Little Endian
      • ARM Data – Configurable
    • SDRC Memory Controller
      • 16- and 32-Bit Memory Controller with 1GB of
        Total Address Space
      • Double Data Rate (DDR2) SDRAM, Mobile Double Data Rate
        (mDDR)SDRAM
      • SDRAM Memory Scheduler (SMS) and Rotation Engine
    • General Purpose Memory Controller (GPMC)
      • 16-Bit-Wide Multiplexed Address/Data Bus
      • Up to 8 Chip-Select Pins with 128MB of Address
        Space per Chip-Select Pin
      • Glueless Interface to NOR Flash, NAND Flash (with ECC
        Hamming Code Calculation), SRAM and Pseudo-SRAM
      • Flexible Asynchronous Protocol Control for Interface
        to Custom Logic (FPGA, CPLD, ASICs, and so forth)
      • Nonmultiplexed Address/Data Mode (Limited 2-KB
        Address Space)
    • Test Interfaces
      • IEEE-1149.1 (JTAG) Boundary-Scan Compatible
      • Embedded Trace Macro Interface (ETM)
    • 65-nm CMOS Technology
    • Packages:
      • 491-Pin BGA (17 x 17, 0.65-mm Pitch)
        [ZCN Suffix]
        with Via Channel Array
        Technology
      • 484-Pin PBGA (23 x 23, 1-mm Pitch)
        [ZER Suffix]
    • AM3517/05 Sitara Processor:
      • MPU Subsystem
        • 600-MHz Sitara ARM Cortex-A8 Core
        • NEON SIMD Coprocessor and Vector
          Floating-Point (FP) Coprocessor
      • Memory Interfaces:
        • 166-MHz 16- and 32-Bit mDDR/DDR2
          Interface with 1GB of Total Addressable
          Space
        • Up to 83 MHz General-Purpose Memory
          Interface Supporting 16-Bit-Wide
          Multiplexed Address/DataBus
        • 64KB of SRAM
        • 3 Removable Media Interfaces
          [MMC/SD/SDIO]
      • IO Voltage:
        • mDDR/DDR2 IOs: 1.8V
        • Other IOs: 1.8V and 3.3V
      • Core Voltage: 1.2V
      • Commercial and Extended Temperature Grade
        (operating restrictions apply)
      • 16-Bit Video Input Port Capable of
        Capturing HD Video
      • HD Resolution Display Subsystem
      • Serial Communication
        • High-End CAN Controller
        • 10/100 Mbit Ethernet MAC
        • USB OTG Subsystem with Standard
          DP/DM Interface [HS/FS/LS]
        • Multiport USB Host Subsystem [HS/FS/LS]
          • 12-Pin ULPI or 6-, 4-, or 3-Pin Serial
            Interface
        • Four Master and Slave Multichannel Serial
          Port Interface(McSPI) Ports
        • Five Multichannel Buffered Serial Ports (McBSPs)
          • 512-Byte Transmit and Receive Buffer
            (McBSP1/3/4/5)
          • 5-KB Transmit and Receive Buffer (McBSP2)
          • SIDETONE Core Support (McBSP2 and
            McBSP3 Only)For Filter, Gain, and Mix
            Operations
          • 128-Channel Transmit and Receive Mode
          • Direct Interface to I2S and PCM Device and
            TDM Buses
        • HDQ/1-Wire Interface
        • 4 UARTs (One with Infrared Data Association
          [IrDA] and Consumer Infrared [CIR] Modes)
        • 3 Master and Slave High-Speed Inter-Integrated
          Circuit (I2C) Controllers
        • Twelve 32-bit General-Purpose Timers
        • One 32-bit Watchdog Timer
        • One 32-bit 32-kHz Sync Timer
        • Up to 186 General-Purpose I/O (GPIO) Pins
    • Display Subsystem
      • Parallel Digital Output
      • Up to 24-Bit RGB
      • Supports Up to 2 LCD Panels
      • Support for Remote Frame Buffer Interface (RFBI)
        LCD Panels
      • Two 10-Bit Digital-to-Analog Converters (DACs)
        Supporting
        • Composite NTSC/PAL Video
        • Luma/Chroma Separate Video (S-Video)
      • Rotation of 90, 180, and 270 Degrees
      • Resize Images From 1/4x to 8x
      • Color Space Converter
      • 8-Bit Alpha Blending
    • Video Processing Front End (VPFE) 16-Bit Video Input Port
      • RAW Data Interface
      • 75-MHz Maximum Pixel Clock
      • Supports REC656/CCIR656 Standard
      • Supports YCbCr422 Format (8-Bit or 16-Bit with Discrete
        Horizontal and Vertical Sync Signals)
      • Generates Optical Black Clamping Signals
      • Built-in Digital Clamping and Black Level Compensation
      • 10-Bit to 8-Bit A-law Compression Hardware
      • Supports up to 16K Pixels (Image Size) in Horizontal
        and Vertical Directions
    • System Direct Memory Access (sDMA) Controller (32 Logical
      Channels with Configurable Priority)
    • Comprehensive Power, Reset, and Clock Management
    • ARM Cortex-A8 Memory Architecture
      • ARMv7 Architecture
        • In-Order, Dual-Issue, Superscalar Microprocessor Core
        • ARM NEON Multimedia Architecture
        • Over 2x Performance of ARMv6 SIMD
        • Supports Both Integer and Floating-Point SIMD
        • Jazelle RCT Execution Environment Architecture
        • Dynamic Branch Prediction with Branch Target Address
          Cache, Global History Buffer and 8-Entry Return Stack
        • Embedded Trace Macrocell [ETM] Support for
          Noninvasive Debug
        • 16KB of Instruction Cache (4-Way Set-Associative)
        • 16KB of Data Cache (4-Way Set-Associative)
        • 256KB of L2 Cache
      • PowerVR SGX Graphics Accelerator (AM3517 Only)
        • Tile-Based Architecture Delivering up to 10 MPoly/sec
        • Universal Scalable Shader Engine: Multi-threaded Engine
          Incorporating Pixel and Vertex Shader Functionality
        • Industry Standard API Support: OpenGLES 1.1 and
          2.0, OpenVG1.0
        • Fine-Grained Task Switching, Load Balancing, and
          Power Management
        • Programmable, High-Quality Image Anti-Aliasing
      • Endianess
        • ARM Instructions – Little Endian
        • ARM Data – Configurable
      • SDRC Memory Controller
        • 16- and 32-Bit Memory Controller with 1GB of
          Total Address Space
        • Double Data Rate (DDR2) SDRAM, Mobile Double Data Rate
          (mDDR)SDRAM
        • SDRAM Memory Scheduler (SMS) and Rotation Engine
      • General Purpose Memory Controller (GPMC)
        • 16-Bit-Wide Multiplexed Address/Data Bus
        • Up to 8 Chip-Select Pins with 128MB of Address
          Space per Chip-Select Pin
        • Glueless Interface to NOR Flash, NAND Flash (with ECC
          Hamming Code Calculation), SRAM and Pseudo-SRAM
        • Flexible Asynchronous Protocol Control for Interface
          to Custom Logic (FPGA, CPLD, ASICs, and so forth)
        • Nonmultiplexed Address/Data Mode (Limited 2-KB
          Address Space)
      • Test Interfaces
        • IEEE-1149.1 (JTAG) Boundary-Scan Compatible
        • Embedded Trace Macro Interface (ETM)
      • 65-nm CMOS Technology
      • Packages:
        • 491-Pin BGA (17 x 17, 0.65-mm Pitch)
          [ZCN Suffix]
          with Via Channel Array
          Technology
        • 484-Pin PBGA (23 x 23, 1-mm Pitch)
          [ZER Suffix]

      AM3517/05 is a high-performance ARM Cortex-A8 microprocessor with speeds up to 600 MHz. The device offers 3D graphics acceleration while also supporting numerous peripherals, including DDR2, CAN, EMAC, and USB OTG PHY that are well suited for industrial apllications.

      The processor can support other applications, including: Single-board computers Home and industrial automation Human machine Interface

      The device supports high-level operating systems (OSs), such as:

      • Linux®
      • Windows® CE
      • Android™

      The following subsystems are part of the device:

      • Microprocessor unit (MPU) subsystem based on the ARM Cortex-A8 microprocessor
      • PowerVR SGX graphics accelerator (AM3517 device only) subsystem for 3D graphics acceleration to support display and gaming effects
      • Display subsystem with several features for multiple concurrent image manipulation, and a programmable interface supporting a wide variety of displays. The display subsystem also supports NTSC/PAL video out.
      • High-performance interconnects provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals. The device also offers a comprehensive clock-management scheme.

      AM3517/05 devices are available in a 491-pin BGA package and a 484-pin PBGA package.

      This AM3517/05 data manual presents the electrical and mechanical specifications for the AM3517/05 Sitara processor.

      AM3517/05 is a high-performance ARM Cortex-A8 microprocessor with speeds up to 600 MHz. The device offers 3D graphics acceleration while also supporting numerous peripherals, including DDR2, CAN, EMAC, and USB OTG PHY that are well suited for industrial apllications.

      The processor can support other applications, including: Single-board computers Home and industrial automation Human machine Interface

      The device supports high-level operating systems (OSs), such as:

      • Linux®
      • Windows® CE
      • Android™

      The following subsystems are part of the device:

      • Microprocessor unit (MPU) subsystem based on the ARM Cortex-A8 microprocessor
      • PowerVR SGX graphics accelerator (AM3517 device only) subsystem for 3D graphics acceleration to support display and gaming effects
      • Display subsystem with several features for multiple concurrent image manipulation, and a programmable interface supporting a wide variety of displays. The display subsystem also supports NTSC/PAL video out.
      • High-performance interconnects provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals. The device also offers a comprehensive clock-management scheme.

      AM3517/05 devices are available in a 491-pin BGA package and a 484-pin PBGA package.

      This AM3517/05 data manual presents the electrical and mechanical specifications for the AM3517/05 Sitara processor.
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      Technische Dokumentation

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      Alle anzeigen 11
      Top-Dokumentation Typ Titel Format-Optionen Datum
      * Data sheet AM3517, AM3505 Sitara Processors datasheet (Rev. F) PDF | HTML 10 Jul 2014
      * Errata AM3517, AM3505 Sitara Processors Silicon Errata (Rev. E) 21 Sep 2016
      * User guide AM35x ARM Microprocessor Technical Reference Manual (Rev. C) 22 Nov 2013
      More literature From Start to Finish: A Product Development Roadmap for Sitara™ Processors 16 Dez 2020
      User guide How-To and Troubleshooting Guide for PRU-ICSS PROFIBUS 24 Sep 2018
      Technical article Spring has sprung. A sale has sprung. PDF | HTML 04 Apr 2016
      Application note Multi-Channel SAE-J2716 (SENT) Decoder Using NHET 05 Aug 2010
      Application note AM35x Power Estimation Spreadsheet 24 Mai 2010
      Application note AM35x VCA PCB Layout 24 Mai 2010
      Application note Migrating from OMAP3530 to AM35x 24 Mai 2010
      Application note AM3517/05 Pwr Ref Design 3.6V to 6.3-V Input, Hi-Effic, Integratd 5-Output PMIC 08 Apr 2010

      Design und Entwicklung

      Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.

      Debug-Tastkopf

      TMDSEMU200-U — XDS200-USB-Debug-Tastkopf

      Der XDS200 ist ein Debug-Tastkopf (Emulator) zum Debugging von Embedded-Bausteinen von TI. Für die meisten Bausteine wird die Verwendung der neueren, kostengünstigeren XDS110 (www.ti.com/tool/TMDSEMU110-U) empfohlen. Der XDS200 unterstützt eine große Zahl von Standards (IEEE1149.1, IEEE1149.7, SWD) (...)

      Nicht verfügbar auf TI.com
      Debug-Tastkopf

      TMDSEMU560V2STM-U — XDS560v2 System-Trace-USB-Debug-Tastkopf

      Der XDS560v2 ist die leistungsstärkste Debug-Sonde aus der XDS560™ Familie von Debug-Sonden und unterstützt sowohl den traditionellen JTAG-Standard (IEEE1149.1) als auch cJTAG (IEEE1149.7).  Bitte beachten: Diese Lösung unterstützt kein Serial Wire Debug (SWD).

      Alle XDS-Debug-Tastköpfe unterstützen (...)

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      Debug-Tastkopf

      TMDSEMU560V2STM-UE — XDS560v2 System-Trace-USB-und Ethernet-Debug-Tastkopf

      The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

      All XDS debug probes support Core and System Trace in all ARM and DSP processors that (...)

      Nicht verfügbar auf TI.com
      Software-Entwicklungskit (SDK)

      ANDROIDSDK-SITARA — Android-Entwicklungskit für Sitara-Mikroprozessoren

      Obwohl das Android-Betriebssystem ursprünglich für Mobiltelefone entwickelt wurde, bietet es Entwicklern von Embedded-Anwendungen die Möglichkeit, ihr Produkt auf einfache Weise mit einem leistungsstarken Betriebssystem auszustatten. Android wurde in Zusammenarbeit mit Google entwickelt und liefert (...)
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      Software-Entwicklungskit (SDK)

      LINUXEZSDK-AM35X — Linux EZ SDK for AM3517, AM3505

      SITARA LINUX SDK

      Linux Software Development Kits (SDK) provide Sitara™ developers with an easy set up and quick out-of-box experience that is specific to and highlights the features of TI's ARM processors. Launching demos, benchmarks and applications is a snap with the included graphical user (...)

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      Codebeispiel oder Demo

      DEMOAPP-AM35X — DEMO – AM35xApplication – Beispiel und Democode

      Free Example Code - TI provides proof-of-concept application code to demonstrate some of the hardware and software capabilities of its devices.

      • Click GET SOFTWARE to access Application Demo and Documentation, based on the AM35x EVM (evaluation module).
      View Options
      Treiber oder Bibliothek

      WIND-3P-VXWORKS-LINUX-OS — Wind-River-Prozessoren VxWorks und Linux-Betriebssysteme

      Wind River is a global leader in delivering software for the Internet of Things (IoT). The company’s technology has been powering the safest, most secure devices in the world since 1981 and today is found in more than 2 billion products. Wind River offers a comprehensive edge-to-cloud product (...)
      Von: Wind River Systems
      Partner-Website besuchen
      IDE, Konfiguration, Compiler oder Debugger

      CCSTUDIO — Code Composer Studio integrated development environment (IDE)

      CCStudio™ IDE is part of TI's extensive CCStudio™ development tool ecosystem. It is an integrated development environment (IDE) for TI's microcontrollers, processors, wireless connectivity devices and radar sensors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize (...)

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      Betriebssystem (BS)

      GHS-3P-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

      The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
      Von: Green Hills Software
      Partner-Website besuchen
      Betriebssystem (BS)

      MG-3P-NUCLEUS-RTOS — Mentor Grafik Nucleus RTOS

      Software driven power management is crucial for battery operated or low power budget embedded systems. Embedded developers can now take advantage of the latest power saving features in popular TI devices with the built-in Power Management Framework in the Nucleus RTOS. Developers specify (...)
      Von: Mentor Graphics Corporation
      Partner-Website besuchen
      Betriebssystem (BS)

      QNX-3P-NEUTRINO-RTOS — QNX Neutrino RTOS

      Das QNX Neutrino® Realtime Operating System (RTOS) ist ein voll ausgestattetes und robustes RTOS, das die nächste Generation von Produkten für eingebettete Systeme in den Bereichen Automobilindustrie, Medizintechnik, Transport, Militär und Industrie ermöglicht. Das Mikrokernel-Design und die (...)
      Von: QNX Software Systems
      Partner-Website besuchen
      Software-Programmiertool

      FLASHTOOL — FlashTool for AM35x, AM37x, DM37x and OMAP35x Devices

      Flash Tool is a Windows-based application that can be used to transfer binary images from a host PC to TI Sitara AM35x, AM37x, DM37x and OMAP35x target platforms.


      Additional Information:

      TI GForge - Welcome to gforge.ti.com

      TI E2E Community

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      Software-Programmiertool

      UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

      UniFlash is a software tool for programming on-chip flash on TI microcontrollers and wireless connectivity devices and on-board flash for TI processors. UniFlash provides both graphical and command-line interfaces.

      UniFlash can be run from the cloud on the TI Developer Zone or downloaded and used (...)

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      Simulationsmodell

      AM35x ZCN BSDL Model (Rev. A)

      SPRM452A.ZIP (11 KB) - BSDL Model
      Herunterladen
      Simulationsmodell

      AM35x ZCN IBIS Model (Rev. A)

      SPRM451A.ZIP (1436 KB) - IBIS Model
      Herunterladen
      Simulationsmodell

      AM35x ZER BSDL Model

      SPRM505.ZIP (10 KB) - BSDL Model
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      Simulationsmodell

      AM35x ZER IBIS Model (Rev. A)

      SPRM504A.ZIP (1431 KB) - IBIS Model
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      Berechnungstool

      CLOCKTREETOOL — Taktbaum-Tool für Sitara, Automobilanwendungen, Sichtanalytik und digitale Signalprozessoren

      The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
      • Visualize the device clock tree
      • Interact with clock tree (...)
      Benutzerhandbuch: PDF
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      Berechnungstool

      POWEREST — Tool zur Schätzung des Stromverbrauchs (Power Estimation Tool, PET)

      Das Tool zur Schätzung des Stromverbrauchs (Power Estimation Tool, PET) bietet Benutzern die Möglichkeit, Einblicke in den Stromverbrauch ausgewählter TI-Prozessoren zu erhalten. Das Tool bietet dem Benutzer die Möglichkeit, mehrere Anwendungsszenarien auszuwählen und ein besseres Verständnis des (...)
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      Gehäuse Pins CAD-Symbole, Footprints und 3D-Modelle
      BGA (ZER) 484 Ultra Librarian
      NFBGA (ZCN) 491 Ultra Librarian
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