SPRUIM2H May 2020 – October 2023 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
Table 4-60 shows an overview of the MPU configuration. In the R5 MPU, higher numbered regions have priority, therefore in Table 4-60, where two regions overlap, the region on the right defines the memory attributes.
Memory Address | Regions | |||
---|---|---|---|---|
0x0000_0000 | Region 0 non-executable full access |
Region 10 | ||
0x0000_003F | ||||
... | ||||
0x4101_0000 | Region 3 TCM User access |
Region 4 TCM Priv access |
||
0x4101_0FFF | ||||
0x4101_1000 | ||||
0x4101_7FFF | ||||
... | ||||
0x4180_0000 | Region 1 ROM User access |
Region 2 ROM Priv access |
||
0x4180_7FFF | ||||
0x4180_8000 | ||||
0x4183_FFFF | ||||
... | ||||
0x6000_0000 | Region 11 OSPI memory Cached memory |
|||
... | ||||
0x67FF_FFFF | ||||
... | ||||
0x7000_0000 | Region 5 MSRAM All Access Non-cacheable |
|||
0x7017_FFFF | ||||
0x7018_0000 | Region 6 non-cacheable |
|||
0x701F_FFFF | ||||
0x7020_0000 | ||||
... | ||||
0xFFFF_FFFF |