The time-base period register (EPWM_TBPRD) has a
shadow register. Shadowing allows the register update to be synchronized with the
hardware. The following definitions are used to describe all shadow registers in the
EPWM module:
- Active Register: The
active register controls the hardware and is responsible for actions that
the hardware causes or invokes.
- Shadow Register: The
shadow register buffers or provides a temporary holding location for the
active register. It has no direct effect on any control hardware. At a
strategic point in time the shadow register's content is transferred to the
active register. This prevents corruption or spurious operation due to the
register being asynchronously modified by software.
The memory address of the shadow period register
is the same as the active register. Which register is written to or read from is
determined by the EPWM_TBCTL[3] PRDLD bit. This bit enables and disables the
EPWM_TBPRD shadow register as follows:
- Time-Base Period Shadow Mode: The
EPWM_TBPRD shadow register is enabled when EPWM_TBCTL[3] PRDLD = 0h. Reads
from and writes to the EPWM_TBPRD register memory address go to the shadow
register. The shadow register contents are transferred to the active
register (EPWM_TBPRD (Active) ← EPWM_TBPRD (shadow)) when the time-base
counter register (EPWM_TBCNT) equals zero (TBCNT = 0000h). By default the
EPWM_TBPRD shadow register is enabled.
- Time-Base Period Immediate Load Mode: If
immediate load mode is selected (EPWM_TBCTL[3] PRDLD = 1h), then a read from
or a write to the TBPRD memory address goes directly to the active
register.