SPRUIM2H May 2020 – October 2023 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
The FSI transmitter module handles the framing of data, CRC generation, and signal generation of TXCLK, TXD0, and TXD1, as well as interrupt generation. The operation of the transmitter core is controlled and configured through programmable control registers. The transmitter control registers allow the CPU to program, control, and monitor the operation of the FSI receiver. The transmit data buffer is accessible by the CPU.
The transmitter has the following features:
Figure 12-2344 shows the high-level block diagram of the FSI transmitter. Figure 12-2345 shows the block diagram of the transmitter core submodule.
The following sections describe the various aspects of the FSI transmitter in detail.