SPRUIM2H May 2020 – October 2023 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
The PCIe core decodes all MSI and MSI-X messages received from the link and forwards them as a 32-bit write transaction on the AXI controller interface.
The destination address for MSI/MSI-X write transactions should be the ARM GIC. The GIC will process the write transaction and create an interrupt to the ARM Ax CPU core in the device.