DMSC power management supports:
- DMSC control:
- Contains various
control, configuration, and status registers for power management
functions
- Main features of oscillators
control:
- Controls the main
oscillator power down
- Controls the gating
of the POR RC oscillator root clock of the main oscillator, to avoid
high frequency clock propagation during oscillator wake-up
- DMSC memory power
management:
- Power-off of ROM
during sleep modes
- RAM retention during
sleep modes
- I/O power management:
- Controls I/O
isolation while going into standby mode
- Controls I/O wake-up
capability
- External signals for power
control:
- Support for 64
Cortex-M3 controlled general purpose outputs
- Support for 64
general purpose inputs which can be used by Cortex-M3
- Support for 64
hardware controlled outputs
- Support for 64
hardware controlled inputs
- Target VBUSP port to directly
connect to Power Sleep Controller (PSC)
Note:
Power resource management of the
device is controlled through the firmware running on the DMSC.
Note:
For more information on how to use
DMSC, see the TISCI API.