SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
Table 8-8 describes the events servicing in sending mode.
Step | Register/Bit Field/Programming Model | Value |
---|---|---|
Read interrupt status bit | MAILBOX_IRQ_STATUS_CLR_j[1 + y*2] | 0x1 |
Write message | MAILBOX_MESSAGE_y[31:0] VALUE | 0x-- |
Write 1 to acknowledge interrupt | MAILBOX_IRQ_STATUS_CLR_j[1 + y*2] | 0x1 |