SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
Module Instance | Module Interrupt Signal | Destination Interrupt Input | Destination | Description | Type |
---|---|---|---|---|---|
C7X256V0_CLEC | C7X256V0_CLEC_arm_0_eventi_out_0 | COMPUTE_CLUSTER0_cpu_evnt_eventi_IN_0 | COMPUTE_CLUSTER0 | C7X256V0_CLEC interrupt request | pulse |
C7X256V0_CLEC | C7X256V0_CLEC_dft_pbist_cpu_0 | R5FSS0_CORE0_intr_IN_113 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | pulse |
C7X256V0_CLEC | C7X256V0_CLEC_dft_pbist_cpu_0 | WKUP_R5FSS0_CORE0_intr_IN_113 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | pulse |
C7X256V0_CLEC | C7X256V0_CLEC_dft_pbist_cpu_0 | MCU_R5FSS0_CORE0_cpu0_intr_IN_113 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | pulse |
C7X256V0_CLEC | C7X256V0_CLEC_dft_pbist_cpu_0 | ESM0_esm_pls_event0_IN_226 | ESM0 | C7X256V0_CLEC interrupt request | pulse |
C7X256V0_CLEC | C7X256V0_CLEC_dft_pbist_cpu_0 | ESM0_esm_pls_event1_IN_226 | ESM0 | C7X256V0_CLEC interrupt request | pulse |
C7X256V0_CLEC | C7X256V0_CLEC_dft_pbist_cpu_0 | ESM0_esm_pls_event2_IN_226 | ESM0 | C7X256V0_CLEC interrupt request | pulse |
C7X256V0_CLEC | C7X256V0_CLEC_dft_pbist_cpu_0 | TIFS0_nvic_IN_231 | TIFS0 | C7X256V0_CLEC interrupt request | pulse |
C7X256V0_CLEC | C7X256V0_CLEC_dft_pbist_cpu_0 | HSM0_nvic_IN_231 | HSM0 | C7X256V0_CLEC interrupt request | pulse |
C7X256V0_CLEC | C7X256V0_CLEC_dft_pbist_safety_error_0 | ESM0_esm_lvl_event_IN_149 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_160 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_161 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_162 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_163 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_164 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_165 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_166 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_167 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_160 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_161 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_162 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_163 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_164 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_165 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_166 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_167 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_160 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_161 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_162 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_163 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_164 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_165 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_166 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_167 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_160 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_161 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_162 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_163 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_164 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_165 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_166 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_167 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_160 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_161 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_162 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_163 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_164 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_165 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_166 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_167 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_160 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_161 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_162 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_163 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_164 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_165 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_166 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_167 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_160 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_161 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_162 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_163 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_164 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_165 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_166 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_167 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_160 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_161 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_162 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_163 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_164 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_165 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_166 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_167 | ESM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_0 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_1 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_2 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_3 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_4 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_5 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_6 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_7 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_8 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_9 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_10 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_11 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_12 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_13 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_14 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_15 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_16 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_17 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_18 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_19 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_20 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_21 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_22 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_23 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_24 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_25 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_26 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_27 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_28 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_29 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_30 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_31 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_32 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_33 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_34 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_35 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_36 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_37 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_38 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_39 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_40 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_41 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_42 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_43 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_44 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_45 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_46 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_47 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_48 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_49 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_50 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_51 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_52 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_53 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_54 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_55 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_56 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_57 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_58 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_59 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_60 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_61 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_62 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_280 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_281 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_282 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_283 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_284 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_285 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_286 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_287 | GICSS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | R5FSS0_CORE0_intr_IN_249 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | R5FSS0_CORE0_intr_IN_250 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | R5FSS0_CORE0_intr_IN_254 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | R5FSS0_CORE0_intr_IN_255 | R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | WKUP_R5FSS0_CORE0_intr_IN_249 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | WKUP_R5FSS0_CORE0_intr_IN_250 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | WKUP_R5FSS0_CORE0_intr_IN_254 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | WKUP_R5FSS0_CORE0_intr_IN_255 | WKUP_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | MCU_R5FSS0_CORE0_cpu0_intr_IN_249 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | MCU_R5FSS0_CORE0_cpu0_intr_IN_250 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | MCU_R5FSS0_CORE0_cpu0_intr_IN_254 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | MCU_R5FSS0_CORE0_cpu0_intr_IN_255 | MCU_R5FSS0_CORE0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | C7X256V1_CLEC_soc_events_in_IN_12 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | C7X256V1_CLEC_soc_events_in_IN_13 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | C7X256V1_CLEC_soc_events_in_IN_14 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | C7X256V1_CLEC_soc_events_in_IN_15 | C7X256V1_CLEC | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | TIFS0_nvic_IN_119 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | TIFS0_nvic_IN_120 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | TIFS0_nvic_IN_121 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | TIFS0_nvic_IN_122 | TIFS0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | HSM0_nvic_IN_119 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | HSM0_nvic_IN_120 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | HSM0_nvic_IN_121 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V0_CLEC | C7X256V0_CLEC_soc_events_out_level_63 | HSM0_nvic_IN_122 | HSM0 | C7X256V0_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_arm_0_eventi_out_0 | COMPUTE_CLUSTER0_cpu_evnt_eventi_IN_0 | COMPUTE_CLUSTER0 | C7X256V1_CLEC interrupt request | pulse |
C7X256V1_CLEC | C7X256V1_CLEC_dft_pbist_cpu_0 | R5FSS0_CORE0_intr_IN_113 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | pulse |
C7X256V1_CLEC | C7X256V1_CLEC_dft_pbist_cpu_0 | WKUP_R5FSS0_CORE0_intr_IN_113 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | pulse |
C7X256V1_CLEC | C7X256V1_CLEC_dft_pbist_cpu_0 | MCU_R5FSS0_CORE0_cpu0_intr_IN_113 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | pulse |
C7X256V1_CLEC | C7X256V1_CLEC_dft_pbist_cpu_0 | ESM0_esm_pls_event0_IN_245 | ESM0 | C7X256V1_CLEC interrupt request | pulse |
C7X256V1_CLEC | C7X256V1_CLEC_dft_pbist_cpu_0 | ESM0_esm_pls_event1_IN_245 | ESM0 | C7X256V1_CLEC interrupt request | pulse |
C7X256V1_CLEC | C7X256V1_CLEC_dft_pbist_cpu_0 | ESM0_esm_pls_event2_IN_245 | ESM0 | C7X256V1_CLEC interrupt request | pulse |
C7X256V1_CLEC | C7X256V1_CLEC_dft_pbist_cpu_0 | TIFS0_nvic_IN_194 | TIFS0 | C7X256V1_CLEC interrupt request | pulse |
C7X256V1_CLEC | C7X256V1_CLEC_dft_pbist_cpu_0 | HSM0_nvic_IN_194 | HSM0 | C7X256V1_CLEC interrupt request | pulse |
C7X256V1_CLEC | C7X256V1_CLEC_dft_pbist_safety_error_0 | ESM0_esm_lvl_event_IN_64 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_192 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_193 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_194 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_195 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_196 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_197 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_198 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_0 | ESM0_esm_lvl_event_IN_199 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_192 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_193 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_194 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_195 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_196 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_197 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_198 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_1 | ESM0_esm_lvl_event_IN_199 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_192 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_193 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_194 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_195 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_196 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_197 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_198 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_2 | ESM0_esm_lvl_event_IN_199 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_192 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_193 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_194 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_195 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_196 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_197 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_198 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_3 | ESM0_esm_lvl_event_IN_199 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_192 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_193 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_194 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_195 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_196 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_197 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_198 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_4 | ESM0_esm_lvl_event_IN_199 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_192 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_193 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_194 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_195 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_196 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_197 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_198 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_5 | ESM0_esm_lvl_event_IN_199 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_192 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_193 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_194 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_195 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_196 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_197 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_198 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_6 | ESM0_esm_lvl_event_IN_199 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_192 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_193 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_194 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_195 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_196 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_197 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_198 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_esm_events_out_level_7 | ESM0_esm_lvl_event_IN_199 | ESM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_0 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_1 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_2 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_3 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_4 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_5 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_6 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_7 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_8 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_9 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_10 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_11 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_12 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_13 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_14 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_15 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_16 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_17 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_18 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_19 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_20 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_21 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_22 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_23 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_24 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_25 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_26 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_27 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_28 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_29 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_30 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_31 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_32 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_33 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_34 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_35 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_36 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_37 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_38 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_39 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_40 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_41 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_42 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_43 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_44 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_45 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_46 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_47 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_48 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_49 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_50 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_51 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_52 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_53 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_54 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_55 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_56 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_57 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_58 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_59 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_60 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_61 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_62 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_50 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_51 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_52 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_53 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_54 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_55 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_56 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | GICSS0_spi_IN_57 | GICSS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | R5FSS0_CORE0_intr_IN_244 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | R5FSS0_CORE0_intr_IN_245 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | R5FSS0_CORE0_intr_IN_246 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | R5FSS0_CORE0_intr_IN_247 | R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | WKUP_R5FSS0_CORE0_intr_IN_120 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | WKUP_R5FSS0_CORE0_intr_IN_121 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | WKUP_R5FSS0_CORE0_intr_IN_122 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | WKUP_R5FSS0_CORE0_intr_IN_165 | WKUP_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | MCU_R5FSS0_CORE0_cpu0_intr_IN_244 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | MCU_R5FSS0_CORE0_cpu0_intr_IN_245 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | MCU_R5FSS0_CORE0_cpu0_intr_IN_246 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | MCU_R5FSS0_CORE0_cpu0_intr_IN_247 | MCU_R5FSS0_CORE0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | C7X256V0_CLEC_soc_events_in_IN_12 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | C7X256V0_CLEC_soc_events_in_IN_13 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | C7X256V0_CLEC_soc_events_in_IN_14 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | C7X256V0_CLEC_soc_events_in_IN_15 | C7X256V0_CLEC | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | TIFS0_nvic_IN_127 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | TIFS0_nvic_IN_128 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | TIFS0_nvic_IN_129 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | TIFS0_nvic_IN_130 | TIFS0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | HSM0_nvic_IN_127 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | HSM0_nvic_IN_128 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | HSM0_nvic_IN_129 | HSM0 | C7X256V1_CLEC interrupt request | level |
C7X256V1_CLEC | C7X256V1_CLEC_soc_events_out_level_63 | HSM0_nvic_IN_130 | HSM0 | C7X256V1_CLEC interrupt request | level |
Module Instance | Module Clock Input | Source Clock | Source Control Register | Description |
---|---|---|---|---|
C7X256V0_CLECC7X256V1_CLEC |