SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
Bits | Field | Type | Reset | Description |
---|---|---|---|---|
31 | valid | r/o | 0 |
Indicates that the num field of this register is valid 1 – num field is valid (pending IRQ interrupt) 0 – num field is invalid (no pending IRQ interrupts) |
30:20 | reserved | r/o | 0 | Always read as 0. Writes have no effect. |
19:16 | pri | r/o | 0 | This field indicates the priority of the pending IRQ interrupt. This field is only valid if the valid flag (bit 31) is set. Otherwise the value is unpredictable |
15:10 | reserved | r/o | 0 | Always read as 0. Writes have no effect. |
9:0 | num | r/o | 0 |
This field indicates the interrupt number of the pending IRQ interrupt with the highest priority. This field is only valid if the valid flag (bit 31) is set. Otherwise the value is unpredictable 0 – Interrupt 0 1 – Interrupt 1 1023 – Interrupt 1023 Note: The highest value is determined by the num_groups parameter |