SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
Domain Instance | Domain Input | Input/ MUX | DCCCLKSRC0/ DCCCLKSRC1 Value | Source Instance | Source Interface | Clock Source |
---|---|---|---|---|---|---|
DCC0 | dcc_input00_clk | 0 | 0 | GLUELOGIC_HFOSC0_CLOCKLOSS_DETECTION | HFOSC0_CLKOUT | HFOSC0_CLKOUT |
DCC0 | dcc_input01_clk | 0 | 1 | PINFUNCTION_EXT_REFCLK1in | EXT_REFCLK1 | EXT_REFCLK1 |
DCC0 | dcc_input02_clk | 0 | 2 | GLUELOGIC_RCOSC | CLKOUT | CLK_12M_RC |
DCC0 | dcc_input03_clk | 0 | 3 | PLLCTRL0 | FICLK | main_SYSCLK0/4 |
DCC0 | dcc_input10_clk | 1 | 0 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0/2 |
DCC0 | dcc_clksrc0_clk | 1 | 1 | hsdiv4_16fft_main_0 | hsdivout1_clk | MAIN_PLL0_HSDIV1_CLKOUT |
DCC0 | dcc_clksrc1_clk | 1 | 2 | hsdiv4_16fft_main_0 | hsdivout2_clk | MAIN_PLL0_HSDIV2_CLKOUT |
DCC0 | dcc_clksrc2_clk | 1 | 3 | hsdiv4_16fft_main_0 | hsdivout3_clk | MAIN_PLL0_HSDIV3_CLKOUT |
DCC0 | dcc_clksrc3_clk | 1 | 4 | hsdiv4_16fft_main_0 | hsdivout4_clk | MAIN_PLL0_HSDIV4_CLKOUT |
DCC0 | dcc_clksrc4_clk | 1 | 5 | GLUELOGIC_HFOSC0_CLOCKLOSS_DETECTION | HFOSC0_CLKOUT | HFOSC0_CLKOUT |
DCC0 | dcc_clksrc5_clk | 1 | 6 | PINFUNCTION_EXT_REFCLK1in | EXT_REFCLK1 | EXT_REFCLK1 |
DCC0 | dcc_clksrc6_clk | 1 | 7 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0 |
DCC0 | dcc_clksrc7_clk | 1 | 8 | postdiv4_16ff_main_2 | hsdivout8_clk | MAIN_PLL2_HSDIV8_CLKOUT |
DCC0 | vbus_clk | 1 | 9 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0/4 |
Domain Instance | Domain Input | Input/ MUX | DCCCLKSRC0/ DCCCLKSRC1 Value | Source Instance | Source Interface | Clock Source |
---|---|---|---|---|---|---|
DCC1 | dcc_input00_clk | 0 | 0 | GLUELOGIC_HFOSC0_CLOCKLOSS_DETECTION | HFOSC0_CLKOUT | HFOSC0_CLKOUT |
DCC1 | dcc_input01_clk | 0 | 1 | PINFUNCTION_EXT_REFCLK1in | EXT_REFCLK1 | EXT_REFCLK1 |
DCC1 | dcc_input02_clk | 0 | 2 | GLUELOGIC_RCOSC | CLKOUT | CLK_12M_RC |
DCC1 | dcc_input03_clk | 0 | 3 | PLLCTRL0 | FICLK | main_SYSCLK0/4 |
DCC1 | dcc_input10_clk | 1 | 0 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0/4 |
DCC1 | dcc_clksrc0_clk | 1 | 1 | postdiv4_16ff_main_0 | hsdivout5_clk | MAIN_PLL0_HSDIV5_CLKOUT |
DCC1 | dcc_clksrc1_clk | 1 | 2 | postdiv4_16ff_main_0 | hsdivout6_clk | MAIN_PLL0_HSDIV6_CLKOUT |
DCC1 | dcc_clksrc2_clk | 1 | 3 | postdiv4_16ff_main_0 | hsdivout7_clk | MAIN_PLL0_HSDIV7_CLKOUT |
DCC1 | dcc_clksrc3_clk | 1 | 4 | hsdiv4_16fft_main_1 | hsdivout1_clk | MAIN_PLL1_HSDIV1_CLKOUT |
DCC1 | dcc_clksrc4_clk | 1 | 5 | hsdiv3_16fft_main_15 | hsdivout2_clk | MAIN_PLL15_HSDIV2_CLKOUT/4 |
DCC1 | dcc_clksrc5_clk | 1 | 6 | hsdiv4_16fft_main_1 | hsdivout0_clk | MAIN_PLL1_HSDIV0_CLKOUT |
DCC1 | dcc_clksrc6_clk | 1 | 7 | GLUELOGIC_RCOSC | CLKOUT | CLK_12M_RC |
DCC1 | dcc_clksrc7_clk | 1 | 8 | hsdiv4_16fft_main_1 | hsdivout2_clk | MAIN_PLL1_HSDIV2_CLKOUT |
DCC1 | vbus_clk | 1 | 9 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0/4 |
Domain Instance | Domain Input | Input/ MUX | DCCCLKSRC0/ DCCCLKSRC1 Value | Source Instance | Source Interface | Clock Source |
---|---|---|---|---|---|---|
DCC2 | dcc_input00_clk | 0 | 0 | GLUELOGIC_HFOSC0_CLOCKLOSS_DETECTION | HFOSC0_CLKOUT | HFOSC0_CLKOUT |
DCC2 | dcc_input01_clk | 0 | 1 | PINFUNCTION_EXT_REFCLK1in | EXT_REFCLK1 | EXT_REFCLK1 |
DCC2 | dcc_input02_clk | 0 | 2 | GLUELOGIC_RCOSC | CLKOUT | CLK_12M_RC |
DCC2 | dcc_input03_clk | 0 | 3 | PLLCTRL0 | FICLK | main_SYSCLK0/4 |
DCC2 | dcc_input10_clk | 1 | 0 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0/4 |
DCC2 | dcc_clksrc0_clk | 1 | 1 | hsdiv4_16fft_main_1 | hsdivout3_clk | MAIN_PLL1_HSDIV3_CLKOUT |
DCC2 | dcc_clksrc1_clk | 1 | 2 | hsdiv3_16fft_main_15 | hsdivout0_clk | MAIN_PLL15_HSDIV0_CLKOUT |
DCC2 | dcc_clksrc2_clk | 1 | 3 | postdiv1_16fft_main_1 | hsdivout5_clk | MAIN_PLL1_HSDIV5_CLKOUT |
DCC2 | dcc_clksrc3_clk | 1 | 4 | postdiv1_16fft_main_1 | hsdivout6_clk | MAIN_PLL1_HSDIV6_CLKOUT |
DCC2 | dcc_clksrc4_clk | 1 | 5 | hsdiv2_16fft_main_5 | hsdivout1_clk | MAIN_PLL5_HSDIV1_CLKOUT |
DCC2 | dcc_clksrc5_clk | 1 | 6 | hsdiv3_16fft_main_15 | hsdivout1_clk | MAIN_PLL15_HSDIV1_CLKOUT |
DCC2 | dcc_clksrc6_clk | 1 | 7 | hsdiv4_16fft_main_2 | hsdivout2_clk | MAIN_PLL2_HSDIV2_CLKOUT |
DCC2 | dcc_clksrc7_clk | 1 | 8 | PINFUNCTION_RMII2_REF_CLKin | RMII2_REF_CLK | RMII2_REF_CLK |
DCC2 | vbus_clk | 1 | 9 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0/4 |
Domain Instance | Domain Input | Input/ MUX | DCCCLKSRC0/ DCCCLKSRC1 Value | Source Instance | Source Interface | Clock Source |
---|---|---|---|---|---|---|
DCC3 | dcc_input00_clk | 0 | 0 | GLUELOGIC_HFOSC0_CLOCKLOSS_DETECTION | HFOSC0_CLKOUT | HFOSC0_CLKOUT |
DCC3 | dcc_input01_clk | 0 | 1 | PINFUNCTION_EXT_REFCLK1in | EXT_REFCLK1 | EXT_REFCLK1 |
DCC3 | dcc_input02_clk | 0 | 2 | GLUELOGIC_RCOSC | CLKOUT | CLK_12M_RC |
DCC3 | dcc_input03_clk | 0 | 3 | PLLCTRL0 | FICLK | main_SYSCLK0/4 |
DCC3 | dcc_input10_clk | 1 | 0 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0/4 |
DCC3 | dcc_clksrc0_clk | 1 | 1 | hsdiv4_16fft_main_1 | hsdivout0_clk | MAIN_PLL1_HSDIV0_CLKOUT |
DCC3 | dcc_clksrc1_clk | 1 | 2 | postdiv4_16ff_main_2 | hsdivout5_clk | MAIN_PLL2_HSDIV5_CLKOUT |
DCC3 | dcc_clksrc3_clk | 1 | 4 | postdiv4_16ff_main_2 | hsdivout7_clk | MAIN_PLL2_HSDIV7_CLKOUT |
DCC3 | dcc_clksrc4_clk | 1 | 5 | postdiv4_16ff_main_2 | hsdivout6_clk | MAIN_PLL2_HSDIV6_CLKOUT |
DCC3 | dcc_clksrc5_clk | 1 | 6 | postdiv4_16ff_main_2 | hsdivout9_clk | MAIN_PLL2_HSDIV9_CLKOUT |
DCC3 | dcc_clksrc6_clk | 1 | 7 | A53SS0 | a53_divh_clk4_obsclk_out_clk | a53_divh_clk4_obsclk_out_clk/4 |
DCC3 | dcc_clksrc7_clk | 1 | 8 | DDR32SS0 | ddr_pll_divh_clk4_obsclk_out_clk | ddr_pll_divh_clk4_obsclk_out_clk |
DCC3 | vbus_clk | 1 | 9 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0/4 |
Domain Instance | Domain Input | Input/ MUX | DCCCLKSRC0/ DCCCLKSRC1 Value | Source Instance | Source Interface | Clock Source |
---|---|---|---|---|---|---|
DCC4 | dcc_input00_clk | 0 | 0 | GLUELOGIC_HFOSC0_CLOCKLOSS_DETECTION | HFOSC0_CLKOUT | HFOSC0_CLKOUT |
DCC4 | dcc_input01_clk | 0 | 1 | PINFUNCTION_EXT_REFCLK1in | EXT_REFCLK1 | EXT_REFCLK1 |
DCC4 | dcc_input02_clk | 0 | 2 | GLUELOGIC_RCOSC | CLKOUT | CLK_12M_RC |
DCC4 | dcc_input03_clk | 0 | 3 | PLLCTRL0 | FICLK | main_SYSCLK0/4 |
DCC4 | dcc_input10_clk | 1 | 0 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0/2 |
DCC4 | dcc_clksrc0_clk | 1 | 1 | PINFUNCTION_GPMC0_CLKLBin | GPMC0_CLKLB | GPMC0_CLKLB |
DCC4 | dcc_clksrc1_clk | 1 | 2 | PINFUNCTION_CP_GEMAC_CPTS0_RFT_CLKin | CP_GEMAC_CPTS0_RFT_CLK | CP_GEMAC_CPTS_REF_CLK |
DCC4 | dcc_clksrc2_clk | 1 | 3 | PINFUNCTION_AUDIO_EXT_REFCLK1in | AUDIO_EXT_REFCLK1 | AUDIO_EXT_REFCLK1 |
DCC4 | dcc_clksrc3_clk | 1 | 4 | DPHY_RX0 | ppi_rx_byte_clk | ppi_rx_byte_clk |
DCC4 | dcc_clksrc4_clk | 1 | 5 | PINFUNCTION_MCU_EXT_REFCLK0in | MCU_EXT_REFCLK0 | MCU_EXT_REFCLK0 |
DCC4 | dcc_clksrc5_clk | 1 | 6 | PINFUNCTION_RMII1_REF_CLKin | RMII1_REF_CLK | RMII1_REF_CLK/4 |
DCC4 | dcc_clksrc6_clk | 1 | 7 | PINFUNCTION_RGMII1_RXCin | RGMII1_RXC | RGMII1_RXC |
DCC4 | dcc_clksrc7_clk | 1 | 8 | CLK_32K_RC_SEL | out0 | DEVICE_CLKOUT_32K |
DCC4 | vbus_clk | 1 | 9 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0/4 |
Domain Instance | Domain Input | Input/ MUX | DCCCLKSRC0/ DCCCLKSRC1 Value | Source Instance | Source Interface | Clock Source |
---|---|---|---|---|---|---|
DCC5 | dcc_input00_clk | 0 | 0 | GLUELOGIC_HFOSC0_CLOCKLOSS_DETECTION | HFOSC0_CLKOUT | HFOSC0_CLKOUT |
DCC5 | dcc_input01_clk | 0 | 1 | PINFUNCTION_EXT_REFCLK1in | EXT_REFCLK1 | EXT_REFCLK1 |
DCC5 | dcc_input02_clk | 0 | 2 | GLUELOGIC_RCOSC | CLKOUT | CLK_12M_RC |
DCC5 | dcc_input03_clk | 0 | 3 | PLLCTRL0 | FICLK | main_SYSCLK0/4 |
DCC5 | dcc_input10_clk | 1 | 0 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0 |
DCC5 | dcc_clksrc0_clk | 1 | 1 | postdiv4_16ff_main_0 | hsdivout8_clk | MAIN_PLL0_HSDIV8_CLKOUT |
DCC5 | dcc_clksrc1_clk | 1 | 2 | PINFUNCTION_AUDIO_EXT_REFCLK2in | AUDIO_EXT_REFCLK2 | AUDIO_EXT_REFCLK2 |
DCC5 | dcc_clksrc2_clk | 1 | 3 | hsdiv4_16fft_main_2 | hsdivout1_clk | MAIN_PLL2_HSDIV1_CLKOUT |
DCC5 | dcc_clksrc3_clk | 1 | 4 | hsdiv4_16fft_main_2 | hsdivout3_clk | MAIN_PLL2_HSDIV3_CLKOUT |
DCC5 | dcc_clksrc4_clk | 1 | 5 | hsdiv4_16fft_main_2 | hsdivout4_clk | MAIN_PLL2_HSDIV4_CLKOUT |
DCC5 | dcc_clksrc5_clk | 1 | 6 | hsdiv2_16fft_main_5 | hsdivout0_clk | MAIN_PLL5_HSDIV0_CLKOUT/2 |
DCC5 | dcc_clksrc6_clk | 1 | 7 | hsdiv0_16fft_main_17 | hsdivout0_clk | MAIN_PLL17_HSDIV0_CLKOUT |
DCC5 | dcc_clksrc7_clk | 1 | 8 | PINFUNCTION_RGMII2_RXCin | RGMII2_RXC | RGMII2_RXC |
DCC5 | vbus_clk | 1 | 9 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0/4 |
Domain Instance | Domain Input | Input/ MUX | DCCCLKSRC0/ DCCCLKSRC1 Value | Source Instance | Source Interface | Clock Source |
---|---|---|---|---|---|---|
DCC6 | dcc_input00_clk | 0 | 0 | GLUELOGIC_HFOSC0_CLOCKLOSS_DETECTION | HFOSC0_CLKOUT | HFOSC0_CLKOUT |
DCC6 | dcc_input01_clk | 0 | 1 | PINFUNCTION_EXT_REFCLK1in | EXT_REFCLK1 | EXT_REFCLK1 |
DCC6 | dcc_input02_clk | 0 | 2 | GLUELOGIC_RCOSC | CLKOUT | CLK_12M_RC |
DCC6 | dcc_input03_clk | 0 | 3 | PLLCTRL0 | FICLK | main_SYSCLK0/4 |
DCC6 | dcc_input10_clk | 1 | 0 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0 |
DCC6 | dcc_clksrc0_clk | 1 | 1 | PINFUNCTION_VOUT0_EXTPCLKINin | VOUT0_EXTPCLKIN | VOUT_EXTPCLKIN |
DCC6 | dcc_clksrc1_clk | 1 | 2 | PINFUNCTION_MCASP0_ACLKXin | MCASP0_ACLKX | MCASP0_ACLKX |
DCC6 | dcc_clksrc2_clk | 1 | 3 | PINFUNCTION_MCASP0_ACLKRin | MCASP0_ACLKR | MCASP0_ACLKR |
DCC6 | dcc_clksrc3_clk | 1 | 4 | PINFUNCTION_MCASP1_ACLKXin | MCASP1_ACLKX | MCASP1_ACLKX |
DCC6 | dcc_clksrc4_clk | 1 | 5 | PINFUNCTION_MCASP1_ACLKRin | MCASP1_ACLKR | MCASP1_ACLKR |
DCC6 | dcc_clksrc5_clk | 1 | 6 | PINFUNCTION_MCASP2_ACLKXin | MCASP2_ACLKX | MCASP2_ACLKX |
DCC6 | dcc_clksrc6_clk | 1 | 7 | PINFUNCTION_MCASP2_ACLKRin | MCASP2_ACLKR | MCASP2_ACLKR |
DCC6 | dcc_clksrc7_clk | 1 | 8 | PINFUNCTION_AUDIO_EXT_REFCLK0in | AUDIO_EXT_REFCLK0 | AUDIO_EXT_REFCLK0 |
DCC6 | vbus_clk | 1 | 9 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0/4 |
Domain Instance | Domain Input | Input/ MUX | DCCCLKSRC0/ DCCCLKSRC1 Value | Source Instance | Source Interface | Clock Source |
---|---|---|---|---|---|---|
DCC7 | dcc_input00_clk | 0 | 0 | GLUELOGIC_HFOSC0_CLOCKLOSS_DETECTION | HFOSC0_CLKOUT | HFOSC0_CLKOUT |
DCC7 | dcc_input01_clk | 0 | 1 | PINFUNCTION_EXT_REFCLK1in | EXT_REFCLK1 | EXT_REFCLK1 |
DCC7 | dcc_input02_clk | 0 | 2 | GLUELOGIC_RCOSC | CLKOUT | CLK_12M_RC |
DCC7 | dcc_input03_clk | 0 | 3 | PLLCTRL0 | FICLK | main_SYSCLK0/4 |
DCC7 | dcc_input10_clk | 1 | 0 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0 |
DCC7 | dcc_clksrc0_clk | 1 | 1 | hsdiv2_16fft_main_5 | hsdivout2_clk | MAIN_PLL5_HSDIV2_CLKOUT/2 |
DCC7 | dcc_clksrc1_clk | 1 | 2 | GPU0 | gpu_dcc_clk | gpu_dcc_clk/4 |
DCC7 | dcc_clksrc2_clk | 1 | 3 | hsdiv0_16fft_main_16 | hsdivout0_clk | MAIN_PLL16_HSDIV0_CLKOUT/8 |
DCC7 | dcc_clksrc5_clk | 1 | 6 | postdiv4_16ff_main_0 | hsdivout9_clk | MAIN_PLL0_HSDIV9_CLKOUT |
DCC7 | dcc_clksrc6_clk | 1 | 7 | hsdiv4_16fft_main_1 | hsdivout4_clk | DSS_fclk |
DCC7 | dcc_clksrc7_clk | 1 | 8 | hsdiv4_16fft_main_2 | hsdivout0_clk | MAIN_PLL2_HSDIV0_CLKOUT |
DCC7 | vbus_clk | 1 | 9 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0/4 |
Domain Instance | Domain Input | Input/ MUX | DCCCLKSRC0/ DCCCLKSRC1 Value | Source Instance | Source Interface | Clock Source |
---|---|---|---|---|---|---|
DCC8 | dcc_input00_clk | 0 | 0 | GLUELOGIC_HFOSC0_CLOCKLOSS_DETECTION | HFOSC0_CLKOUT | HFOSC0_CLKOUT |
DCC8 | dcc_input01_clk | 0 | 1 | PINFUNCTION_EXT_REFCLK1in | EXT_REFCLK1 | EXT_REFCLK1 |
DCC8 | dcc_input02_clk | 0 | 2 | GLUELOGIC_RCOSC | CLKOUT | CLK_12M_RC |
DCC8 | dcc_input03_clk | 0 | 3 | PLLCTRL0 | FICLK | main_SYSCLK0/4 |
DCC8 | dcc_input10_clk | 1 | 0 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0 |
DCC8 | dcc_clksrc0_clk | 1 | 1 | hsdiv3_16fft_main_15 | hsdivout3_clk | MAIN_PLL15_HSDIV3_CLKOUT/4 |
DCC8 | dcc_clksrc1_clk | 1 | 2 | hsdiv0_16fft_main_18 | hsdivout0_clk | MAIN_PLL18_HSDIV0_CLKOUT/2 |
DCC8 | dcc_clksrc4_clk | 1 | 5 | PINFUNCTION_MCASP3_ACLKXin | MCASP3_ACLKX | MCASP3_ACLKX |
DCC8 | dcc_clksrc5_clk | 1 | 6 | PINFUNCTION_MCASP3_ACLKRin | MCASP3_ACLKR | MCASP3_ACLKR |
DCC8 | dcc_clksrc6_clk | 1 | 7 | PINFUNCTION_MCASP4_ACLKXin | MCASP4_ACLKX | MCASP4_ACLKX |
DCC8 | dcc_clksrc7_clk | 1 | 8 | PINFUNCTION_MCASP4_ACLKRin | MCASP4_ACLKR | MCASP4_ACLKR |
DCC8 | vbus_clk | 1 | 9 | PLLCTRL0 | chip_div1_clk_clk | main_SYSCLK0/4 |
Domain Instance | Domain Input | Input/ MUX | DCCCLKSRC0/ DCCCLKSRC1 Value | Source Instance | Source Interface | Clock Source |
---|---|---|---|---|---|---|
MCU_DCC0 | dcc_input00_clk | 0 | 0 | GLUELOGIC_HFOSC0_CLOCKLOSS_DETECTION | HFOSC0_CLKOUT | HFOSC0_CLKOUT |
MCU_DCC0 | dcc_input01_clk | 0 | 1 | RCOSC_32KHz_GEN_DIV3 | out0 | CLK_32K_RC |
MCU_DCC0 | dcc_input02_clk | 0 | 2 | GLUELOGIC_RCOSC | CLKOUT | CLK_12M_RC |
MCU_DCC0 | dcc_input03_clk | 0 | 3 | MCU_PLLCTRL0 | FICLK | main_SYSCLK0/4 |
MCU_DCC0 | dcc_input10_clk | 1 | 0 | MCU_PLLCTRL0 | chip_div1_clk_clk | MCU_SYSCLK0/2 |
MCU_DCC0 | dcc_clksrc0_clk | 1 | 1 | hsdiv4_16fft_mcu_0 | hsdivout0_clk | MCU_PLL0_HSDIV0_CLKOUT |
MCU_DCC0 | dcc_clksrc1_clk | 1 | 2 | hsdiv4_16fft_mcu_0 | hsdivout1_clk | MCU_PLL0_HSDIV1_CLKOUT |
MCU_DCC0 | dcc_clksrc2_clk | 1 | 3 | hsdiv4_16fft_mcu_0 | hsdivout2_clk | MCU_PLL0_HSDIV2_CLKOUT |
MCU_DCC0 | dcc_clksrc3_clk | 1 | 4 | hsdiv4_16fft_mcu_0 | hsdivout3_clk | MCU_PLL0_HSDIV3_CLKOUT/4 |
MCU_DCC0 | dcc_clksrc4_clk | 1 | 5 | hsdiv4_16fft_mcu_0 | hsdivout4_clk | MCU_PLL0_HSDIV4_CLKOUT |
MCU_DCC0 | dcc_clksrc5_clk | 1 | 6 | RCOSC_32KHz_GEN_DIV3 | out0 | CLK_32K_RC |
MCU_DCC0 | dcc_clksrc6_clk | 1 | 7 | CLK_32K_RC_SEL | out0 | DEVICE_CLKOUT_32K |
MCU_DCC0 | dcc_clksrc7_clk | 1 | 8 | PINFUNCTION_MCU_EXT_REFCLK0in | MCU_EXT_REFCLK0 | MCU_EXT_REFCLK0 |
MCU_DCC0 | vbus_clk | 1 | 9 | MCU_PLLCTRL0 | chip_div1_clk_clk | MCU_SYSCLK0/4 |
Domain Instance | Domain Input | Input/ MUX | DCCCLKSRC0/ DCCCLKSRC1 Value | Source Instance | Source Interface | Clock Source |
---|---|---|---|---|---|---|
MCU_DCC1 | dcc_input00_clk | 0 | 0 | GLUELOGIC_HFOSC0_CLOCKLOSS_DETECTION | HFOSC0_CLKOUT | HFOSC0_CLKOUT |
MCU_DCC1 | dcc_input01_clk | 0 | 1 | RCOSC_32KHz_GEN_DIV3 | out0 | CLK_32K_RC |
MCU_DCC1 | dcc_input02_clk | 0 | 2 | GLUELOGIC_RCOSC | CLKOUT | CLK_12M_RC |
MCU_DCC1 | dcc_input03_clk | 0 | 3 | MCU_PLLCTRL0 | FICLK | main_SYSCLK0/4 |
MCU_DCC1 | dcc_input10_clk | 1 | 0 | MCU_PLLCTRL0 | chip_div1_clk_clk | MCU_SYSCLK0/2 |
MCU_DCC1 | dcc_clksrc0_clk | 1 | 1 | postdiv1_16fft_mcu_0 | hsdivout5_clk | MCU_PLL0_HSDIV5_CLKOUT |
MCU_DCC1 | dcc_clksrc1_clk | 1 | 2 | postdiv1_16fft_mcu_0 | hsdivout6_clk | MCU_PLL0_HSDIV6_CLKOUT |
MCU_DCC1 | dcc_clksrc2_clk | 1 | 3 | GLUELOGIC_CLOCK_TIE_0 | clk | main_tieoff0 |
MCU_DCC1 | dcc_clksrc5_clk | 1 | 6 | RCOSC_32KHz_GEN_DIV3 | out0 | CLK_32K_RC |
MCU_DCC1 | dcc_clksrc6_clk | 1 | 7 | CLK_32K_RC_SEL | out0 | DEVICE_CLKOUT_32K |
MCU_DCC1 | dcc_clksrc7_clk | 1 | 8 | PINFUNCTION_MCU_EXT_REFCLK0in | MCU_EXT_REFCLK0 | MCU_EXT_REFCLK0 |
MCU_DCC1 | vbus_clk | 1 | 9 | MCU_PLLCTRL0 | chip_div1_clk_clk | MCU_SYSCLK0/4 |