Figure 12-106 shows the FSS block diagram.
FSS Blocks:
- CBASS0: The CBASS0 interconnect allows FSS to
communicate with the device modules and
subsystems.
- Data Interface: It is 64-bit data/32-bit address
multi issue data interface with coherent in-band
bypass. It provides accessibility to the
FSS0_OSPI0.
- Config Interface: It is used for configuration of
the memory mapped registers within the FSS.
- Interface Clock and Reset:
- For more information, see FSS0 Clocks and
Resets.
- For more information, see FSS0_OSPI Clocks and
Resets.
- Interrupts: For more information, see
FSS0_OSPI Hardware Requests.
- Memory Mapped Registers: This block includes the
FSS registers. The configuration of these
registers defines which FSS features are used. For
more information, see FSS Registers.
- FSS0_OSPI0: For more information about OSPI,
please see Octal Serial Peripheral Interface
(OSPI).
- FSS0_OSPI0 I/O Pins: For more information, see
OSPI I/O Signals.