SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
J722S contains two ESM modules to consolidate the error interrupts in SoC. One is in the MAIN domain and one is in the WKUP domain. Figure 10-2 shows how error interrupts are connected to these two ESM. See also and
The error interrupts from the WKUP_R5FSS domain are routed to both MAIN_ESM and WKUP_ESM. Users can configure ESM to cause ESM generating interrupt output from the interrupt inputs. The interrupt outputs of the MAIN_ESM are routed as interrupt inputs to the WKUP_ESM. The interrupt outputs of the WKUP_ESM are routed as the interrupt inputs to the MAIN_ESM. This means that user can configure the device to use one ESM to monitor the error interrupts for the whole device. J722S supports the following three use cases.