SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
In each access register mode (operational mode or configuration mode A/B), some register accesses are conditional on the programming of a submode (MSR_SPR, TCR_TLR, and XOFF). These registers are identified in Table 12-93, UART Load FIFO Triggers Defined by the Concatenated Value.
Table 12-71 through Table 12-73 summarize the register access submodes.
Mode | Condition |
---|---|
MSR_SPR | (UART_EFR[4] = 0x0 or UART_MCR[6] = 0x0) |
TCR_TLR | UART_EFR[4] = 0x1 and UART_MCR[6] = 0x1 |
Mode | Condition |
---|---|
TCR_TLR | UART_EFR[4] = 0x1 and UART_MCR[6] = 0x1 |
XOFF | (UART_EFR[4] = 0x0 or UART_MCR[6] = 0x0) |
Mode | Condition |
---|---|
MSR_SPR | UART_EFR[4] = 0x0 or UART_MCR[6] = 0x0 |
TCR_TLR | UART_EFR[4] = 0x1 and UART_MCR[6] = 0x1 |