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AM3505

現行

Sitara 處理器：Arm Cortex-A8、視訊前端

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產品規格表
使用指南
勘誤表

AM3505

現行
產品規格表 立即訂購

產品詳細資料

CPU 1 Arm Cortex-A8 Frequency (MHz) 600 Graphics acceleration 1 3D Display type 1 LCD Protocols Ethernet Hardware accelerators Image video accelerator Operating system Linux, RTOS Security Cryptographic acceleration Rating Catalog Operating temperature range (°C) -40 to 105
CPU 1 Arm Cortex-A8 Frequency (MHz) 600 Graphics acceleration 1 3D Display type 1 LCD Protocols Ethernet Hardware accelerators Image video accelerator Operating system Linux, RTOS Security Cryptographic acceleration Rating Catalog Operating temperature range (°C) -40 to 105
BGA (ZER) 484 529 mm² 23 x 23 NFBGA (ZCN) 491 289 mm² 17 x 17
  • AM3517/05 Sitara Processor:
    • MPU Subsystem
      • 600-MHz Sitara ARM Cortex-A8 Core
      • NEON SIMD Coprocessor and Vector
        Floating-Point (FP) Coprocessor
    • Memory Interfaces:
      • 166-MHz 16- and 32-Bit mDDR/DDR2
        Interface with 1GB of Total Addressable
        Space
      • Up to 83 MHz General-Purpose Memory
        Interface Supporting 16-Bit-Wide
        Multiplexed Address/DataBus
      • 64KB of SRAM
      • 3 Removable Media Interfaces
        [MMC/SD/SDIO]
    • IO Voltage:
      • mDDR/DDR2 IOs: 1.8V
      • Other IOs: 1.8V and 3.3V
    • Core Voltage: 1.2V
    • Commercial and Extended Temperature Grade
      (operating restrictions apply)
    • 16-Bit Video Input Port Capable of
      Capturing HD Video
    • HD Resolution Display Subsystem
    • Serial Communication
      • High-End CAN Controller
      • 10/100 Mbit Ethernet MAC
      • USB OTG Subsystem with Standard
        DP/DM Interface [HS/FS/LS]
      • Multiport USB Host Subsystem [HS/FS/LS]
        • 12-Pin ULPI or 6-, 4-, or 3-Pin Serial
          Interface
      • Four Master and Slave Multichannel Serial
        Port Interface(McSPI) Ports
      • Five Multichannel Buffered Serial Ports (McBSPs)
        • 512-Byte Transmit and Receive Buffer
          (McBSP1/3/4/5)
        • 5-KB Transmit and Receive Buffer (McBSP2)
        • SIDETONE Core Support (McBSP2 and
          McBSP3 Only)For Filter, Gain, and Mix
          Operations
        • 128-Channel Transmit and Receive Mode
        • Direct Interface to I2S and PCM Device and
          TDM Buses
      • HDQ/1-Wire Interface
      • 4 UARTs (One with Infrared Data Association
        [IrDA] and Consumer Infrared [CIR] Modes)
      • 3 Master and Slave High-Speed Inter-Integrated
        Circuit (I2C) Controllers
      • Twelve 32-bit General-Purpose Timers
      • One 32-bit Watchdog Timer
      • One 32-bit 32-kHz Sync Timer
      • Up to 186 General-Purpose I/O (GPIO) Pins
  • Display Subsystem
    • Parallel Digital Output
    • Up to 24-Bit RGB
    • Supports Up to 2 LCD Panels
    • Support for Remote Frame Buffer Interface (RFBI)
      LCD Panels
    • Two 10-Bit Digital-to-Analog Converters (DACs)
      Supporting
      • Composite NTSC/PAL Video
      • Luma/Chroma Separate Video (S-Video)
    • Rotation of 90, 180, and 270 Degrees
    • Resize Images From 1/4x to 8x
    • Color Space Converter
    • 8-Bit Alpha Blending
  • Video Processing Front End (VPFE) 16-Bit Video Input Port
    • RAW Data Interface
    • 75-MHz Maximum Pixel Clock
    • Supports REC656/CCIR656 Standard
    • Supports YCbCr422 Format (8-Bit or 16-Bit with Discrete
      Horizontal and Vertical Sync Signals)
    • Generates Optical Black Clamping Signals
    • Built-in Digital Clamping and Black Level Compensation
    • 10-Bit to 8-Bit A-law Compression Hardware
    • Supports up to 16K Pixels (Image Size) in Horizontal
      and Vertical Directions
  • System Direct Memory Access (sDMA) Controller (32 Logical
    Channels with Configurable Priority)
  • Comprehensive Power, Reset, and Clock Management
  • ARM Cortex-A8 Memory Architecture
    • ARMv7 Architecture
      • In-Order, Dual-Issue, Superscalar Microprocessor Core
      • ARM NEON Multimedia Architecture
      • Over 2x Performance of ARMv6 SIMD
      • Supports Both Integer and Floating-Point SIMD
      • Jazelle RCT Execution Environment Architecture
      • Dynamic Branch Prediction with Branch Target Address
        Cache, Global History Buffer and 8-Entry Return Stack
      • Embedded Trace Macrocell [ETM] Support for
        Noninvasive Debug
      • 16KB of Instruction Cache (4-Way Set-Associative)
      • 16KB of Data Cache (4-Way Set-Associative)
      • 256KB of L2 Cache
    • PowerVR SGX Graphics Accelerator (AM3517 Only)
      • Tile-Based Architecture Delivering up to 10 MPoly/sec
      • Universal Scalable Shader Engine: Multi-threaded Engine
        Incorporating Pixel and Vertex Shader Functionality
      • Industry Standard API Support: OpenGLES 1.1 and
        2.0, OpenVG1.0
      • Fine-Grained Task Switching, Load Balancing, and
        Power Management
      • Programmable, High-Quality Image Anti-Aliasing
    • Endianess
      • ARM Instructions – Little Endian
      • ARM Data – Configurable
    • SDRC Memory Controller
      • 16- and 32-Bit Memory Controller with 1GB of
        Total Address Space
      • Double Data Rate (DDR2) SDRAM, Mobile Double Data Rate
        (mDDR)SDRAM
      • SDRAM Memory Scheduler (SMS) and Rotation Engine
    • General Purpose Memory Controller (GPMC)
      • 16-Bit-Wide Multiplexed Address/Data Bus
      • Up to 8 Chip-Select Pins with 128MB of Address
        Space per Chip-Select Pin
      • Glueless Interface to NOR Flash, NAND Flash (with ECC
        Hamming Code Calculation), SRAM and Pseudo-SRAM
      • Flexible Asynchronous Protocol Control for Interface
        to Custom Logic (FPGA, CPLD, ASICs, and so forth)
      • Nonmultiplexed Address/Data Mode (Limited 2-KB
        Address Space)
    • Test Interfaces
      • IEEE-1149.1 (JTAG) Boundary-Scan Compatible
      • Embedded Trace Macro Interface (ETM)
    • 65-nm CMOS Technology
    • Packages:
      • 491-Pin BGA (17 x 17, 0.65-mm Pitch)
        [ZCN Suffix]
        with Via Channel Array
        Technology
      • 484-Pin PBGA (23 x 23, 1-mm Pitch)
        [ZER Suffix]
    • AM3517/05 Sitara Processor:
      • MPU Subsystem
        • 600-MHz Sitara ARM Cortex-A8 Core
        • NEON SIMD Coprocessor and Vector
          Floating-Point (FP) Coprocessor
      • Memory Interfaces:
        • 166-MHz 16- and 32-Bit mDDR/DDR2
          Interface with 1GB of Total Addressable
          Space
        • Up to 83 MHz General-Purpose Memory
          Interface Supporting 16-Bit-Wide
          Multiplexed Address/DataBus
        • 64KB of SRAM
        • 3 Removable Media Interfaces
          [MMC/SD/SDIO]
      • IO Voltage:
        • mDDR/DDR2 IOs: 1.8V
        • Other IOs: 1.8V and 3.3V
      • Core Voltage: 1.2V
      • Commercial and Extended Temperature Grade
        (operating restrictions apply)
      • 16-Bit Video Input Port Capable of
        Capturing HD Video
      • HD Resolution Display Subsystem
      • Serial Communication
        • High-End CAN Controller
        • 10/100 Mbit Ethernet MAC
        • USB OTG Subsystem with Standard
          DP/DM Interface [HS/FS/LS]
        • Multiport USB Host Subsystem [HS/FS/LS]
          • 12-Pin ULPI or 6-, 4-, or 3-Pin Serial
            Interface
        • Four Master and Slave Multichannel Serial
          Port Interface(McSPI) Ports
        • Five Multichannel Buffered Serial Ports (McBSPs)
          • 512-Byte Transmit and Receive Buffer
            (McBSP1/3/4/5)
          • 5-KB Transmit and Receive Buffer (McBSP2)
          • SIDETONE Core Support (McBSP2 and
            McBSP3 Only)For Filter, Gain, and Mix
            Operations
          • 128-Channel Transmit and Receive Mode
          • Direct Interface to I2S and PCM Device and
            TDM Buses
        • HDQ/1-Wire Interface
        • 4 UARTs (One with Infrared Data Association
          [IrDA] and Consumer Infrared [CIR] Modes)
        • 3 Master and Slave High-Speed Inter-Integrated
          Circuit (I2C) Controllers
        • Twelve 32-bit General-Purpose Timers
        • One 32-bit Watchdog Timer
        • One 32-bit 32-kHz Sync Timer
        • Up to 186 General-Purpose I/O (GPIO) Pins
    • Display Subsystem
      • Parallel Digital Output
      • Up to 24-Bit RGB
      • Supports Up to 2 LCD Panels
      • Support for Remote Frame Buffer Interface (RFBI)
        LCD Panels
      • Two 10-Bit Digital-to-Analog Converters (DACs)
        Supporting
        • Composite NTSC/PAL Video
        • Luma/Chroma Separate Video (S-Video)
      • Rotation of 90, 180, and 270 Degrees
      • Resize Images From 1/4x to 8x
      • Color Space Converter
      • 8-Bit Alpha Blending
    • Video Processing Front End (VPFE) 16-Bit Video Input Port
      • RAW Data Interface
      • 75-MHz Maximum Pixel Clock
      • Supports REC656/CCIR656 Standard
      • Supports YCbCr422 Format (8-Bit or 16-Bit with Discrete
        Horizontal and Vertical Sync Signals)
      • Generates Optical Black Clamping Signals
      • Built-in Digital Clamping and Black Level Compensation
      • 10-Bit to 8-Bit A-law Compression Hardware
      • Supports up to 16K Pixels (Image Size) in Horizontal
        and Vertical Directions
    • System Direct Memory Access (sDMA) Controller (32 Logical
      Channels with Configurable Priority)
    • Comprehensive Power, Reset, and Clock Management
    • ARM Cortex-A8 Memory Architecture
      • ARMv7 Architecture
        • In-Order, Dual-Issue, Superscalar Microprocessor Core
        • ARM NEON Multimedia Architecture
        • Over 2x Performance of ARMv6 SIMD
        • Supports Both Integer and Floating-Point SIMD
        • Jazelle RCT Execution Environment Architecture
        • Dynamic Branch Prediction with Branch Target Address
          Cache, Global History Buffer and 8-Entry Return Stack
        • Embedded Trace Macrocell [ETM] Support for
          Noninvasive Debug
        • 16KB of Instruction Cache (4-Way Set-Associative)
        • 16KB of Data Cache (4-Way Set-Associative)
        • 256KB of L2 Cache
      • PowerVR SGX Graphics Accelerator (AM3517 Only)
        • Tile-Based Architecture Delivering up to 10 MPoly/sec
        • Universal Scalable Shader Engine: Multi-threaded Engine
          Incorporating Pixel and Vertex Shader Functionality
        • Industry Standard API Support: OpenGLES 1.1 and
          2.0, OpenVG1.0
        • Fine-Grained Task Switching, Load Balancing, and
          Power Management
        • Programmable, High-Quality Image Anti-Aliasing
      • Endianess
        • ARM Instructions – Little Endian
        • ARM Data – Configurable
      • SDRC Memory Controller
        • 16- and 32-Bit Memory Controller with 1GB of
          Total Address Space
        • Double Data Rate (DDR2) SDRAM, Mobile Double Data Rate
          (mDDR)SDRAM
        • SDRAM Memory Scheduler (SMS) and Rotation Engine
      • General Purpose Memory Controller (GPMC)
        • 16-Bit-Wide Multiplexed Address/Data Bus
        • Up to 8 Chip-Select Pins with 128MB of Address
          Space per Chip-Select Pin
        • Glueless Interface to NOR Flash, NAND Flash (with ECC
          Hamming Code Calculation), SRAM and Pseudo-SRAM
        • Flexible Asynchronous Protocol Control for Interface
          to Custom Logic (FPGA, CPLD, ASICs, and so forth)
        • Nonmultiplexed Address/Data Mode (Limited 2-KB
          Address Space)
      • Test Interfaces
        • IEEE-1149.1 (JTAG) Boundary-Scan Compatible
        • Embedded Trace Macro Interface (ETM)
      • 65-nm CMOS Technology
      • Packages:
        • 491-Pin BGA (17 x 17, 0.65-mm Pitch)
          [ZCN Suffix]
          with Via Channel Array
          Technology
        • 484-Pin PBGA (23 x 23, 1-mm Pitch)
          [ZER Suffix]

      AM3517/05 is a high-performance ARM Cortex-A8 microprocessor with speeds up to 600 MHz. The device offers 3D graphics acceleration while also supporting numerous peripherals, including DDR2, CAN, EMAC, and USB OTG PHY that are well suited for industrial apllications.

      The processor can support other applications, including: Single-board computers Home and industrial automation Human machine Interface

      The device supports high-level operating systems (OSs), such as:

      • Linux®
      • Windows® CE
      • Android™

      The following subsystems are part of the device:

      • Microprocessor unit (MPU) subsystem based on the ARM Cortex-A8 microprocessor
      • PowerVR SGX graphics accelerator (AM3517 device only) subsystem for 3D graphics acceleration to support display and gaming effects
      • Display subsystem with several features for multiple concurrent image manipulation, and a programmable interface supporting a wide variety of displays. The display subsystem also supports NTSC/PAL video out.
      • High-performance interconnects provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals. The device also offers a comprehensive clock-management scheme.

      AM3517/05 devices are available in a 491-pin BGA package and a 484-pin PBGA package.

      This AM3517/05 data manual presents the electrical and mechanical specifications for the AM3517/05 Sitara processor.

      AM3517/05 is a high-performance ARM Cortex-A8 microprocessor with speeds up to 600 MHz. The device offers 3D graphics acceleration while also supporting numerous peripherals, including DDR2, CAN, EMAC, and USB OTG PHY that are well suited for industrial apllications.

      The processor can support other applications, including: Single-board computers Home and industrial automation Human machine Interface

      The device supports high-level operating systems (OSs), such as:

      • Linux®
      • Windows® CE
      • Android™

      The following subsystems are part of the device:

      • Microprocessor unit (MPU) subsystem based on the ARM Cortex-A8 microprocessor
      • PowerVR SGX graphics accelerator (AM3517 device only) subsystem for 3D graphics acceleration to support display and gaming effects
      • Display subsystem with several features for multiple concurrent image manipulation, and a programmable interface supporting a wide variety of displays. The display subsystem also supports NTSC/PAL video out.
      • High-performance interconnects provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals. The device also offers a comprehensive clock-management scheme.

      AM3517/05 devices are available in a 491-pin BGA package and a 484-pin PBGA package.

      This AM3517/05 data manual presents the electrical and mechanical specifications for the AM3517/05 Sitara processor.
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      技術文件

      star =TI 所選的此產品重要文件
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      檢視所有 11
      重要文件 類型 標題 格式選項 日期
      * Data sheet AM3517, AM3505 Sitara Processors datasheet (Rev. F) PDF | HTML 2014年 7月 10日
      * Errata AM3517, AM3505 Sitara Processors Silicon Errata (Rev. E) 2016年 9月 21日
      * User guide AM35x ARM Microprocessor Technical Reference Manual (Rev. C) 2013年 11月 22日
      More literature From Start to Finish: A Product Development Roadmap for Sitara™ Processors 2020年 12月 16日
      User guide How-To and Troubleshooting Guide for PRU-ICSS PROFIBUS 2018年 9月 24日
      Technical article Spring has sprung. A sale has sprung. PDF | HTML 2016年 4月 4日
      Application note Multi-Channel SAE-J2716 (SENT) Decoder Using NHET 2010年 8月 5日
      Application note AM35x Power Estimation Spreadsheet 2010年 5月 24日
      Application note AM35x VCA PCB Layout 2010年 5月 24日
      Application note Migrating from OMAP3530 to AM35x 2010年 5月 24日
      Application note AM3517/05 Pwr Ref Design 3.6V to 6.3-V Input, Hi-Effic, Integratd 5-Output PMIC 2010年 4月 8日

      設計與開發

      如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

      偵錯探測器

      TMDSEMU200-U — XDS200 USB 偵錯探測器

      XDS200 是為 TI 嵌入式裝置偵錯的偵錯探測器（模擬器）。對於大多數裝置，建議使用較新、成本較低的 XDS110 (www.ti.com/tool/TMDSEMU110-U)。XDS200 支援單一 Pod 中廣泛的標準（IEEE1149.1、IEEE1149.7、SWD）。所有 XDS 偵錯探針在所有配備嵌入式追蹤緩衝器 (ETB) 的 Arm® 與 DSP 處理器中均支援核心與系統追蹤。

      XDS200 透過 TI 20 接腳連接器（配備適用 TI 14 接腳、Arm Cortex® 10 接腳和 Arm 20 接腳的多重轉接器）連接到目標電路板，並透過 USB2.0 高速 (...)

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      偵錯探測器

      TMDSEMU560V2STM-U — XDS560v2 System Trace USB 偵錯探測器

      XDS560v2 是 XDS560™ 偵錯探測器系列的最高性能表現，支援傳統 JTAG 標準 (IEEE1149.1) 和 cJTAG (IEEE1149.7)。請注意，序列線偵錯 (SWD) 不受支援。

      所有 XDS 偵錯探測器均支援所有具有嵌入式追踪緩衝區 (ETB) 的 ARM 和 DSP 處理器中的核心和系統追蹤功能。對於針腳追蹤則需要 XDS560v2 PRO TRACE。

      XDS560v2 透過 MIPI HSPT 60 針腳接頭 (具有用於 TI 14 針腳、TI 20 針腳和 ARM 20 針腳的多轉接器) 連接到目標電路板，並透過 USB2.0 高速 (480Mbps) (...)

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      偵錯探測器

      TMDSEMU560V2STM-UE — XDS560v2 System Trace USB 與乙太網路偵錯探測器

      The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

      All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

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      軟體開發套件 (SDK)

      ANDROIDSDK-SITARA — 用於 Sitara 微處理器的 Android 開發套件

      儘管 Android 作業系統最初是為行動手機設計的，但它讓嵌入式應用程式設計人員能夠輕鬆地將高級作業系統添加到產品中。Android 是與 Google 聯合開發的，它提供了一個完整的作業系統，可立即進行整合和生產。


      Android 作業系統的亮點包括：

      • 完整的開放原始程式碼軟體解決方案
      • 基於 Linux
      • 商業開發的簡單授權條款 (Apache)
      • 包括完整的應用程式架構
      • 允許透過 Java 輕鬆整合客戶開發的應用程式
      • 開箱即用的多媒體、圖形和圖形使用者介面
      • 現今已有龐大的 Android 和應用程式開發人員社群
      View Options
      軟體開發套件 (SDK)

      LINUXEZSDK-AM35X — Linux EZ SDK for AM3517, AM3505

      SITARA LINUX SDK

      Linux Software Development Kits (SDK) provide Sitara™ developers with an easy set up and quick out-of-box experience that is specific to and highlights the features of TI's ARM processors. Launching demos, benchmarks and applications is a snap with the included graphical user (...)

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      下載選項
      程式碼範例或展示

      DEMOAPP-AM35X — 展示 - AM35x 應用範例和展示程式碼

      Free Example Code - TI provides proof-of-concept application code to demonstrate some of the hardware and software capabilities of its devices.

      • Click GET SOFTWARE to access Application Demo and Documentation, based on the AM35x EVM (evaluation module).
      View Options
      驅動程式或資料庫

      WIND-3P-VXWORKS-LINUX-OS — Wind River 處理器 VxWorks 和 Linux 作業系統

      Wind River is a global leader in delivering software for the Internet of Things (IoT). The company’s technology has been powering the safest, most secure devices in the world since 1981 and today is found in more than 2 billion products. Wind River offers a comprehensive edge-to-cloud product (...)
      從：Wind River Systems
      造訪合作夥伴網站
      IDE、配置、編譯器或偵錯程式

      CCSTUDIO — Code Composer Studio™ integrated development environment (IDE)

      Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

      (...)

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      作業系統 (OS)

      GHS-3P-INTEGRITY-RTOS — Green Hills INTEGRITY RTOS

      The flagship of Green Hills Software operating systems—the INTEGRITY RTOS—is built around a partitioning architecture to provide embedded systems with total reliability, absolute security, and maximum real-time performance. With its leadership pedigree underscored by certifications in a (...)
      從：Green Hills Software
      造訪合作夥伴網站
      作業系統 (OS)

      MG-3P-NUCLEUS-RTOS — Mentor Graphics Nucleus RTOS

      Software driven power management is crucial for battery operated or low power budget embedded systems. Embedded developers can now take advantage of the latest power saving features in popular TI devices with the built-in Power Management Framework in the Nucleus RTOS. Developers specify (...)
      從：Mentor Graphics Corporation
      造訪合作夥伴網站
      作業系統 (OS)

      QNX-3P-NEUTRINO-RTOS — QNX Neutrino RTOS

      QNX Neutrino® 即時作業系統 (RTOS) 是一款功能完整且穩固的 RTOS，專為實現適用於汽車、醫療、運輸、軍事和工業嵌入式系統的新一代產品而設計。微核心設計與模組化架構，能讓客戶以低整體擁有成本打造高度最佳化且可靠的系統。
      從：QNX Software Systems
      造訪合作夥伴網站
      軟體程式設計工具

      FLASHTOOL — FlashTool for AM35x, AM37x, DM37x and OMAP35x Devices

      Flash Tool is a Windows-based application that can be used to transfer binary images from a host PC to TI Sitara AM35x, AM37x, DM37x and OMAP35x target platforms.


      Additional Information:

      TI GForge - Welcome to gforge.ti.com

      TI E2E Community

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      軟體程式設計工具

      UNIFLASH — UniFlash for most TI microcontrollers (MCUs) and mmWave sensors

      UniFlash is a software tool for programming on-chip flash on TI microcontrollers and wireless connectivity devices and on-board flash for TI processors. UniFlash provides both graphical and command-line interfaces.

      UniFlash can be run from the cloud on the TI Developer Zone or downloaded and used (...)

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      模擬型號

      AM35x ZCN BSDL Model (Rev. A)

      SPRM452A.ZIP (11 KB) - BSDL Model
      下載
      模擬型號

      AM35x ZCN IBIS Model (Rev. A)

      SPRM451A.ZIP (1436 KB) - IBIS Model
      下載
      模擬型號

      AM35x ZER BSDL Model

      SPRM505.ZIP (10 KB) - BSDL Model
      下載
      模擬型號

      AM35x ZER IBIS Model (Rev. A)

      SPRM504A.ZIP (1431 KB) - IBIS Model
      下載
      計算工具

      CLOCKTREETOOL — 適用於 Sitara、車用、視覺分析和數位訊號處理器的時脈樹工具

      The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
      • Visualize the device clock tree
      • Interact with clock tree (...)
      使用指南: PDF
      View Options
      計算工具

      POWEREST — 功率估計工具 (PET)

      功耗估算工具 (PET) 讓使用者能深入瞭解特定 TI 處理器的功耗情況。本工具允許使用者選擇多種應用場景，不僅能掌握功耗數據，更能理解如何運用進階節能技術進一步降低整體功耗。
      AM57x 與 AM437x 處理器專用 PET：

      此可下載試算表提供使用者輸入應用所需裝置參數的機制。參數包含 IP 模組活動狀態/負載量、目標電源模式及電源管理使用情境。可設定多重運作條件並為每種狀態配置時間區段。電源估算數據已內嵌於試算表中，所有結果將直接在試算表內自動生成（無需上傳任何資料）。

      AM57x 專用 PET：

      (...)

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      BGA (ZER) 484 Ultra Librarian
      NFBGA (ZCN) 491 Ultra Librarian
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