SPRUJ28C november 2021 – june 2023 AM68 , AM68A , TDA4AL-Q1 , TDA4VE-Q1 , TDA4VL-Q1
For this combination the Tx Buffers section in the Message RAM is separated in two parts:
If MCAN_TXBC[29-24] TFQS field is empty (zero) - only Dedicated Tx Buffers are used.
Tx prioritization:
Figure 12-257 shows Mixed Dedicated Tx Buffers/Tx Queue example.