產品詳細資料

Applications Wireless infrastructure Number of TXs and RXs 4 TX, 4 RX, 2 F RF frequency (max) (MHz) 6000 RF frequency (min) (MHz) 600 Number of DUCs per TX 1 Number of DDCs per RX 1 Operating temperature range (°C) -40 to 85 Rating Catalog
Applications Wireless infrastructure Number of TXs and RXs 4 TX, 4 RX, 2 F RF frequency (max) (MHz) 6000 RF frequency (min) (MHz) 600 Number of DUCs per TX 1 Number of DDCs per RX 1 Operating temperature range (°C) -40 to 85 Rating Catalog
FCBGA (ABJ) 400 289 mm² 17 x 17
  • Quad transmitters based on direct up-conversion architecture:
    • Up to 600 MHz of RF transmitted bandwidth per chain
  • Quad receivers based on 0-IF down-conversion architecture:
    • Up to 200 MHz of RF received bandwidth per chain
  • Feedback chain based on RF sampling ADC:
    • Up to 600 MHz of RF received bandwidth
  • RF frequency range: 600 MHz to 6 GHz
  • Four wideband fractional-N PLL, VCO for TX and RX LO
  • Dedicated integer-N PLL, VCO for data converters clock generation
  • JESD204B and JESD204C SerDes interface support:
    • 8 SerDes transceivers up to 29.5 Gbps
    • 8b/10b and 64b/66b encoding
    • 16-bit, 12-bit, 24-bit and 32-bit formatting
    • Subclass 1 multi-device synchronization
  • Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch
  • Quad transmitters based on direct up-conversion architecture:
    • Up to 600 MHz of RF transmitted bandwidth per chain
  • Quad receivers based on 0-IF down-conversion architecture:
    • Up to 200 MHz of RF received bandwidth per chain
  • Feedback chain based on RF sampling ADC:
    • Up to 600 MHz of RF received bandwidth
  • RF frequency range: 600 MHz to 6 GHz
  • Four wideband fractional-N PLL, VCO for TX and RX LO
  • Dedicated integer-N PLL, VCO for data converters clock generation
  • JESD204B and JESD204C SerDes interface support:
    • 8 SerDes transceivers up to 29.5 Gbps
    • 8b/10b and 64b/66b encoding
    • 16-bit, 12-bit, 24-bit and 32-bit formatting
    • Subclass 1 multi-device synchronization
  • Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch

The AFE7769 device is a high-performance, multichannel transceiver, integrating four direct up-conversion transmitter chains, four direct down-conversion receiver chains, and two wideband RF sampling digitizing auxiliary chains (feedback paths). The high dynamic range of the transmitter and receiver chains enables wireless base stations to generate and receive 2G, 3G, 4G, and 5G signals.

The low power dissipation and large channel integration of the AFE7769 allows the device to address the power and size constraints of 4G and 5G massive MIMO base stations. The wideband and high dynamic range feedback path can assist the Digital Pre-Distortion (DPD) of the power amplifiers in the transmitter chain. The fast SerDes speed can help reduce the number of lanes required to transfer the data in and out.

Each receiver chain of the AFE7769 includes a 28-dB range digital step attenuator (DSA), followed by a wideband passive IQ demodulator, and a baseband amplifier with integrated programmable antialiasing low pass filters, driving a continuous-time sigma-delta ADC. The RX chain can receive an instantaneous bandwidth (IBW) up to 200 MHz. Each receiver channel has two analog peak power detectors and various digital power detectors to assist an external or internal autonomous AGC control for receiver channels, and a RF overload detector for device reliability protection. The integrated QMC (quadrature mismatch compensation) algorithm is capable to continuously monitor and correct for the RX chain I and Q imbalance mismatch without the need to inject any specific signals or perform offline calibration.

Each transmitter chain includes two 14-bit, 3-Gsps IQ DACs, followed by a programmable reconstruction and DAC image rejection filter, an IQ modulator driving a wideband RF amplifier with 39-dB range gain control. The TX chain integrated QMC and LO leakage cancellation algorithms, leveraging the FB path can constantly track and correct for the TX chain IQ mismatch and LO leakage.

Each FB path is based on RF sampling architecture, and includes an input RF DSA driving a 14-bit, 3-Gsps RF ADC. The direct sampling architecture provides an inherently wideband receiver chain and simplifies the calibration of the TX chains impairments. The FB path integrates two independent NCO that allows a fast switching between two observed RF input bands.

The synthesizer section integrates four fractional-N RF PLL that can generate four different RF LO, allowing the device to support up to two different bands, each one configured as two transmitters, two receivers and one feedback paths.

The AFE7769 device is a high-performance, multichannel transceiver, integrating four direct up-conversion transmitter chains, four direct down-conversion receiver chains, and two wideband RF sampling digitizing auxiliary chains (feedback paths). The high dynamic range of the transmitter and receiver chains enables wireless base stations to generate and receive 2G, 3G, 4G, and 5G signals.

The low power dissipation and large channel integration of the AFE7769 allows the device to address the power and size constraints of 4G and 5G massive MIMO base stations. The wideband and high dynamic range feedback path can assist the Digital Pre-Distortion (DPD) of the power amplifiers in the transmitter chain. The fast SerDes speed can help reduce the number of lanes required to transfer the data in and out.

Each receiver chain of the AFE7769 includes a 28-dB range digital step attenuator (DSA), followed by a wideband passive IQ demodulator, and a baseband amplifier with integrated programmable antialiasing low pass filters, driving a continuous-time sigma-delta ADC. The RX chain can receive an instantaneous bandwidth (IBW) up to 200 MHz. Each receiver channel has two analog peak power detectors and various digital power detectors to assist an external or internal autonomous AGC control for receiver channels, and a RF overload detector for device reliability protection. The integrated QMC (quadrature mismatch compensation) algorithm is capable to continuously monitor and correct for the RX chain I and Q imbalance mismatch without the need to inject any specific signals or perform offline calibration.

Each transmitter chain includes two 14-bit, 3-Gsps IQ DACs, followed by a programmable reconstruction and DAC image rejection filter, an IQ modulator driving a wideband RF amplifier with 39-dB range gain control. The TX chain integrated QMC and LO leakage cancellation algorithms, leveraging the FB path can constantly track and correct for the TX chain IQ mismatch and LO leakage.

Each FB path is based on RF sampling architecture, and includes an input RF DSA driving a 14-bit, 3-Gsps RF ADC. The direct sampling architecture provides an inherently wideband receiver chain and simplifies the calibration of the TX chains impairments. The FB path integrates two independent NCO that allows a fast switching between two observed RF input bands.

The synthesizer section integrates four fractional-N RF PLL that can generate four different RF LO, allowing the device to support up to two different bands, each one configured as two transmitters, two receivers and one feedback paths.

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重要文件 類型 標題 格式選項 日期
* Data sheet AFE7769 Quad-Channel RF Transceiver With Feedback Path datasheet PDF | HTML 2019年 8月 8日
User guide Interfacing AFE7769DEVM With the Hitek Agilex eSOM7 FPGA PDF | HTML 2023年 9月 28日
Application note Using AFE77xx in a Digital Pre-distortion System (Rev. B) 2021年 9月 2日
Application note System Design Considerations when Upgrading from JESD204B to JESD204C (Rev. A) 2021年 4月 5日
Application note Time Division Duplexing (TDD) in AFE77xx Integrated Transceiver (Rev. A) 2021年 4月 5日
Application note AFE76xx, AFE77xx, and AFE79xx JESD204 Layer Testing 2020年 4月 15日
User guide AFE77xx Latte GUI 2019年 7月 25日
Application note Temp Profile to Maintain Optimum FIT Performance 2019年 7月 23日
Application note Controlling Latte GUI from Python 2019年 7月 8日
Application note AFE77xx Power Solutions 2019年 6月 25日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

AFE7769-3P5EVM — 具有 3.5-GHz 支援的 AFE7769 四通道射頻收發器評估模組

AFE7769-3P5 評估模組 (EVM) 是用於評估整合式 RF 收發器 AFE77xx 系列的電路板。AFE7769 和 AFE7799 裝置支援高達四個傳輸、四個接收和二個回饋通道 (4T4R2F),並整合鎖相迴路 (PLL)、用於產生資料轉換器時脈的電壓控制振盪器 (VCO) 及 LO,具有可從 600MHz 調整至 6GHz 的 LO 頻率。

AFE7769-3P5EVM 整合射頻 (RF) 平衡不平衡轉換器和專門支援 3.3GHz 至 3.8GHz 的比對,但可延伸至最高支援 6GHz。AFE77xx 裝置整合八個 JESD204B/C 相容的串聯器/解串器 (SerDes) (...)

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開發板

AFE7769EVM — AFE7769 四通道射頻收發器評估模組

AFE7769 評估模組 (EVM) 是用於評估整合式 RF 收發器 AFE77xx 系列的電路板。AFE77xx 裝置支援高達四個傳輸、四個接收和二 個回饋通道 (4T4R2F),並整合鎖相迴路 (PLL)、用於產生資料轉換器時脈的電壓控制振盪器 (VCO) 及 LO,具有可從 600MHz 調整至 6GHz 的 LO 頻率。

此標準 EVM 整合 RF 平衡不平衡轉換器,專門支援 600MHz 至 2700MHz。AFE77xx 裝置整合八個 JESD204B/C 相容的串聯器/解串器 (SerDes) 收發器 (最高可達 29.5Gbps),以透過板載 FMC (...)

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開發板

HTK-3P-AGILEX-ESOM7 — HITEK Agilex eSOM7 with FMC+ connector to RF transceiver EVMs

The Hitek Systems eSOM7 interfaces with the AFE8092, AFE8030, AFE7952, and AFE7920 through an FPGA mezzanine card (FMC) connector. It provides a quick evaluation and prototyping platform for 5G wireless solutions based on Intel’s latest high-performance 10-nm Agilex F-Series FPGA.

使用指南: PDF | HTML
開發板

ULTICHIP-3P-UC1046 — 基於 UC1046 和 AFE7769 的 Ultichip Communication Technology 小型基地台解決方案

Ultichip Communication Technology Blade40 是基於 Ultichip UC1046 數位前端 (DFE) 與 TI AFE7769 收發器的低成本、高性能 Pico RU 解決方案,支援 4G LTE、5G NR 或 4G/5G 雙模運作。每個天線 Blade40 的輸出功率最高可達 250mW。可以自訂其他配置以滿足使用者需求。

Blade40 支援 4G/5G RRU 的完整 DFE 功能,其中包括預先處理、波頂因數削減 (CFR)、數位預先失真處理 (DPD)、數位上轉換 (DUC)、數位降轉換 (DDC)、可配置濾波器處理器(濾波器)等。

(...)

驅動程式或資料庫

AFE77XX-WI-DESIGN AFE77xx Wireless Infrastructure (WI) design files

Secure Server Folder for all AFE77xx Devices
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TI204C-IP Request for JESD204 rapid design IP

The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)

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開發模組 (EVM) 的 GUI

DATACONVERTERPRO-SW High Speed Data Converter Pro GUI Installer, v5.31

This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)

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封裝 針腳 CAD 符號、佔位空間與 3D 模型
FCBGA (ABJ) 400 Ultra Librarian

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