DAC37J82EVM

DAC37J82 Dual-Channel, 16-Bit, 1.6-GSPS, 1x-16x Interpolating DAC Evaluation Module

DAC37J82EVM

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Overview

 The DAC3XJ8XEVM is an evaluation module (EVM) designed to evaluate the DAC3XJ8X family of high-speed, JESD204B interface DACs (DAC37J82, DAC37J84, DAC38J82, DAC38J84). The EVM includes an onboard clocking solution (LMK04828), transformer coupled outputs, full power solution, and easy-to-use software GUI and USB interface.

The DAC3XJ8XEVM is designed to work seamlessly with the TSW14J56EVM, Texas Instruments’ JESD204B pattern generator card, through the High Speed Data Converter Pro (HSDCPro) software tool for high-speed data converter evaluation. The DAC3XJ8XEVM was also designed to work with many of the development kits from leading FPGA vendors that contain an FMC connector.

  • Allows comprehensive testing of the DAC3XJ8X family of high-speed, JESD204B interface DACs
  • Transformer-coupled signal path enables direct performance testing of the DAC3XJ8X outputs
  • Simplified testing using the onboard LMK04828 JESD204B clocking solution for clock generation, jitter cleaning, or distribution
  • Easy and intuitive software GUI reduces setup time and provides full access to device features
  • Designed for use with TI’s TSW14J56 JESD204B pattern capture and generation tool
  • FMC connector enables use of the DAC3XJ8XEVM with many of the leading FPGA vendor’s development kits
High-speed DACs (>10MSPS)
DAC37J82 Dual-Channel, 16-Bit, 1.6-GSPS, 1x-16x Interpolating Digital-to-Analog Converter (DAC)
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Evaluation board

DAC37J82EVM – DAC37J82 Dual-Channel, 16-Bit, 1.6-GSPS, 1x-16x Interpolating DAC Evaluation Module

Evaluation board

DAC37J82EVM-BDL – DAC37J82EVM + TSW14J57EVM Data Capture / Pattern Generator Bundle

GUI for evaluation module (EVM)

DAC3XJ8XEVM Software (Rev. B) – SLAC644B.ZIP (219583KB)

TI's Standard Terms and Conditions for Evaluation Items apply.

Technical documentation

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Type Title Date
More literature DAC37J82EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
User guide DAC3XJ8XEVM User's Guide (Rev. B) Apr. 28, 2016
User guide DAC3XJ8XEVM Design Package Board (Rev. A) Dec. 02, 2014

Related design resources

Hardware development

EVALUATION BOARD
TSW14J56EVMData capture/pattern generator: data converter EVM with 8 JESD204B lanes from 0.6-12.5Gbps
INTERFACE ADAPTER
TSW14J10EVMData Converter Evaluation Module to FPGA Platform FMC Adapter: 10 JESD204B Lanes up to 12.5Gbps

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