現在提供此產品的更新版本

open-in-new 比較替代產品
功能與所比較的裝置相似
ADC3648 現行 具有 LVDS 介面和高達 32768x 降取的 14 位元、雙通道、250MSPS ADC Lower power and higher SNR

產品詳細資料

Sample rate (max) (Msps) 250 Resolution (Bits) 14 Number of input channels 2 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 600 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 1.9 Power consumption (typ) (mW) 840 Architecture Pipeline SNR (dB) 71.3 ENOB (Bits) 11.4 SFDR (dB) 89 Operating temperature range (°C) -40 to 85 Input buffer Yes
Sample rate (max) (Msps) 250 Resolution (Bits) 14 Number of input channels 2 Interface type DDR LVDS, Parallel CMOS Analog input BW (MHz) 600 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 1.9 Power consumption (typ) (mW) 840 Architecture Pipeline SNR (dB) 71.3 ENOB (Bits) 11.4 SFDR (dB) 89 Operating temperature range (°C) -40 to 85 Input buffer Yes
VQFN (RGC) 64 81 mm² 9 x 9
  • Maximum Sample Rate: 250 MSPS
  • Ultralow Power:
    • 850-mW Total Power at 250 MSPS
  • Integrated Analog Input Buffer:
    • Input Capacitance: 2.2 pF at 170 MHz
    • Input Resistance: 1.1 kΩ at 170 MHz
  • High Dynamic Performance:
    • 85-dBc SFDR at 170 MHz
    • 70.7-dBFS SNR at 170 MHz
  • Crosstalk: > 85 dB at 185 MHz
  • Programmable Gain Up to 6 dB for
    SNR and SFDR Trade-off
  • DC Offset Correction
  • Output Interface Options:
    • 1.8-V Parallel CMOS Interface
    • Double Data Rate (DDR) LVDS with
      Programmable Swing:
      • Standard Swing: 350 mV
      • Low Swing: 200 mV
  • Supports Low Input Clock Amplitude
    Down to 200 mVPP
  • Package: 9.00 mm × 9.00 mm, 64-Pin Quad Flat
    No-Lead (VQFN) Package
  • Maximum Sample Rate: 250 MSPS
  • Ultralow Power:
    • 850-mW Total Power at 250 MSPS
  • Integrated Analog Input Buffer:
    • Input Capacitance: 2.2 pF at 170 MHz
    • Input Resistance: 1.1 kΩ at 170 MHz
  • High Dynamic Performance:
    • 85-dBc SFDR at 170 MHz
    • 70.7-dBFS SNR at 170 MHz
  • Crosstalk: > 85 dB at 185 MHz
  • Programmable Gain Up to 6 dB for
    SNR and SFDR Trade-off
  • DC Offset Correction
  • Output Interface Options:
    • 1.8-V Parallel CMOS Interface
    • Double Data Rate (DDR) LVDS with
      Programmable Swing:
      • Standard Swing: 350 mV
      • Low Swing: 200 mV
  • Supports Low Input Clock Amplitude
    Down to 200 mVPP
  • Package: 9.00 mm × 9.00 mm, 64-Pin Quad Flat
    No-Lead (VQFN) Package

The ADS42B49 is an ultralow-power dual-channel, 14-bit analog-to-digital converter (ADC) featuring integrated analog input buffers. It uses innovative design techniques to achieve high dynamic performance, while consuming extremely low power. The presence of analog input buffers makes this device easy to drive and helps achieve high performance over a wide frequency range. The ADS42B49 is well-suited for multi-carrier, wide bandwidth communications applications.

The ADS42B49 has gain options that can be used to improve SFDR performance at lower full-scale input ranges. This device also includes a dc offset correction loop that can be used to cancel the ADC offset. Both DDR LVDS and parallel CMOS digital output interfaces are available in a compact VQFN-64 PowerPAD™ package.

The device includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. The ADS42B49 is specified over the industrial temperature range (–40°C to 8°C).

The ADS42B49 is an ultralow-power dual-channel, 14-bit analog-to-digital converter (ADC) featuring integrated analog input buffers. It uses innovative design techniques to achieve high dynamic performance, while consuming extremely low power. The presence of analog input buffers makes this device easy to drive and helps achieve high performance over a wide frequency range. The ADS42B49 is well-suited for multi-carrier, wide bandwidth communications applications.

The ADS42B49 has gain options that can be used to improve SFDR performance at lower full-scale input ranges. This device also includes a dc offset correction loop that can be used to cancel the ADC offset. Both DDR LVDS and parallel CMOS digital output interfaces are available in a compact VQFN-64 PowerPAD™ package.

The device includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. The ADS42B49 is specified over the industrial temperature range (–40°C to 8°C).

下載 觀看有字幕稿的影片 影片

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件,然後再試一次。
檢視所有 4
重要文件 類型 標題 格式選項 日期
* Data sheet ADS42B49 Dual-Channel, 14-Bit, 250-MSPS Ultralow-Power ADC with Analog Input Buffer datasheet (Rev. C) PDF | HTML 2016年 3月 30日
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 2015年 5月 22日
User guide ADS42B4x - User's Guide (Rev. A) 2015年 1月 30日
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 2013年 7月 19日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

ADS42B49EVM — 適用於最高達 250 MSPS 之雙通道、緩衝 ADC 輸入的 ADS42B49 評估模組

The ADS42B49EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS42B49 device, an extremely low power dual channel 14-bit 250 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a (...)

使用指南: PDF
TI.com 無法提供
開發模組 (EVM) 的 GUI

ADS58C28SPIGUI-SW ADS42xxx SPI GUI

ADS58C28SPIGUI-SW is the installation package for ADS58C28_ADS42xx_GUI which is used to access or write internal registers of ADS58C28 through an on-board USB port.
支援產品和硬體

支援產品和硬體

開發模組 (EVM) 的 GUI

DATACONVERTERPRO-SW High Speed Data Converter Pro GUI Installer, v5.31

This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)

支援產品和硬體

支援產品和硬體

開發模組 (EVM) 的 GUI

SLAC546 ADS42B49EVM GUI

支援產品和硬體

支援產品和硬體

模擬型號

ADS42B49 IBIS Model

SBAM166.ZIP (40 KB) - IBIS Model
計算工具

ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

支援產品和硬體

支援產品和硬體

設計工具

SBAC119 TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)

支援產品和硬體

支援產品和硬體

配置圖

ADS42XX_58C28EVM DesignPkg (Rev. B)

SLAC459B.ZIP (6548 KB)
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VQFN (RGC) 64 Ultra Librarian

訂購與品質

內含資訊:
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

內容係由 TI 和社群貢獻者依「現狀」提供,且不構成 TI 規範。檢視使用條款

若有關於品質、封裝或訂購 TI 產品的問題,請參閱 TI 支援。​​​​​​​​​​​​​​

影片