LMK04616EVM

LMK04616 Evaluation Module

LMK04616EVM

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Overview

The LMK04616EVM features LMK04616 ultra Low-noise and low power JESD204B compliant Dual Loop Jitter Cleaner. With a power consumption of only 1200 mW with 16 outputs running, LMK04616 supports 65 fs jitter (12 kHz to 20 MHz) using a low noise VCXO module. Integrated LDOs provide high PSRR that enables the use of DC/DC converters.

Features
  • Dual Loop Architecture with typical 60 fs rms from 10 kHz to 20 MHz at 122.88 MHz output frequency
  • Integrated Loopfilter support easy prototyping
  • 1.2 W typical power consumption for 16 outputs at 122.88 MHz
  • Jumper configurable supplies with on-board LDOs and DCDC converters
  • GUI platform for full access to device registers
Clock jitter cleaners & synchronizers
LMK04616 Ultra low-noise and low power JESD204B compliant clock jitter cleaner

 

Buck converters (integrated switch)
TPS62150 3–17V 1A Step-Down Converter with DCS-Control in 3x3 QFN package

 

Linear & low-dropout (LDO) regulators
LP5907 250-mA, low-noise, high-PSRR, ultra-low-dropout voltage regulator with low IQ and enable TPS7A8101 1-A, high-PSRR, adjustable ultra-low-dropout voltage regulator with enable

Get started

  1. Order the LMK04616EVM
  2. Download and install TICSPRO-SW
  3. Read the LMK04616EVM user’s guide
  4. Configure registers on TICSRPRO-SW

Order & start development

Evaluation board

LMK04616EVM — LMK04616 Evaluation Module

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TI's Standard Terms and Conditions for Evaluation Items apply.

Technical documentation

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Type Title Date
* User guide LMK04616 Evaluation Module Mar. 28, 2017
Certificate LMK04616EVM EU Declaration of Conformity (DoC) Jan. 02, 2019
Data sheet LMK04616 Ultra-Low Noise and Low Power JESD204B Compliant Clock Jitter Cleaner With Dual-Loop PLLs datasheet (Rev. B) Jan. 09, 2018

Related design resources

Software development

APPLICATION SOFTWARE & FRAMEWORK
TICSPRO-SW Texas Instruments Clocks and Synthesizers (TICS) Pro Software

Support & training

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