Release date: 10 Oct 2023
Link to Windows single file (offline) installer for latest version of TICS Pro
RF PLLs & synthesizers
Clock jitter cleaners & synchronizers
LMK04208EVM — Two Input, 6+1 Output, Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.9 GHz VCO LMK04803BEVAL — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 1.9 GHz VCO LMK04805BEVAL — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.2 GHz VCO LMK04806BEVAL — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.5 GHz VCO LMK04808BEVAL — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.9 GHz VCO LMK04816BEVAL — Three Input, Thirteen Output, Clock Jitter Cleaner with Dual Cascaded PLLs and Integrated 2.5 GHz VC LMK04832EVM — LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module LMK04832SEPEVM — LMK04832-SEP evaluation module for ultra-low-noise, 3.2-GHz 15-output clock jitter clea LMK04906BEVAL — Three Input, Seven Output, Clock Jitter Cleaner with Dual Cascaded PLLs and Integrated 2.5 GHz VCO LMK5B33216EVM — LMK5B33216 evaluation module for 16-output, three DPLL and APLL, network synchronizer with BAW VCO LMX2571EPEVM — LMX2571-EP evaluation module for 1.34-GHz, low-power, extreme-temperature RF synthesizer LMX2582EVM — LMX2582EVM High Performance, Wideband Frequency PLLatinum RF Synthesizer With Integrated VCO LMX2592EVM — LMX2592EVM high-performance, wideband frequency RF synthesizer PLLATINUM™ integrated circuit LMX2594PSEVM — LMX2594 evaluation module for 15-GHz RF synthesizer with multiple-device phase synchronization LMK04832EVM-CVAL — LMK04832-SP evaluation module for ultra-low-noise, dual-loop, JESD204B clock jitter cleaner LMK04368EPEVM — LMK04368-EP evaluation module for JESD204B/C dual-loop clock jitter cleaner LMK61E0MEVM — LMK61E0M Ultra-Low-Jitter Programmabler Oscillator Evaluation Module LMK61E2EVM — LMK61E2EVM Ultra-Low-Jitter Programmable Oscillator Evaluation Module LMX1204EVM — LMX1204 evaluation module for RF buffer, multiplier and divider with JESD204B/C SYSREF support LMX2594EVM — LMX2594EVM 15-GHz wideband RF synthesizer with phase synchronization & JESD204B evaluation module LMX2595EVM — 20-GHz Wideband RF Synthesizer With Phase Synchronization and JESD204B Evaluation Module LMX2694EPEVM — 15-GHz wideband RF synthesizer evaluation module LMX2572EVM — 6.4-GHz Low Power Wideband RF Synthesizer with Phase Synchronization and JESD204B Support LMX2572LPEVM — 2-GHz Low Power Wideband RF Synthesizer with FSK Modulation Evaluation Module LMX2820EVM — LMX2820 22.6-GHz wideband RF synthesizer evaluation module LMK5B33414EVM — LMK5B33414 evaluation module for 14-output, three DPLL and APLL, network synchronizer with BAW VCO LMK5C33216EVM — LMK5C33216 clock synchronizer DPLL 2 input 16 outputs evaluation module LMK05028EVM — LMK05028 Network Clock Generator and Synchronizer Evaluation Module CDCI6214EVM — CDCI6214 Ultra-Low Power Clock Generator Evaluation Module CDCE6214-Q1EVM — 4 differential and 1 LVCMOS outputs clock generator evaluation module LMK3H0102EVM — LMK3H0102 evaluation module for BAW-based PCIe Gen 1 to Gen 6-compliant clock generator
Release notes (pdf) for latest version of TICS Pro
Manifest file - documents all software and licenses used in the binary distribution
- CDCE6214-Q1 ref_ch_mux linked to register map again
- LMK61E0M EEPROM programming now pauses to await operation completion
- I2C scanning made more robust for many devices
- Many devices now follow datasheet guidance and use SPI CPOL=0 CPHA=0 (previously used CPOL=1 CPHA=1); this may resolve some communication errors on certain devices
- LCM Calculator tool start page issue corrected
- When cascading from VCO3 to DPLL input, the divide value must manually be entered into DPLLx_REF5_RDIV as ( VCO3 output frequency / DPLLx TDC frequency )
- In some cases, it is necessary to press "Calculate Frequency Plan" twice for correct VCO2 frequency. This issue is resolved in LMK05318B GUI.
- Burst mode page looping requires long delays to halt, and halting may crash the GUI. If possible, do not loop in burst mode.
- User Controls page can sometimes become desynchronized from Raw Registers and other pages. Refer to Raw Registers or other pages for correct values. Saving/Loading and Import/Export of register data is unaffected, and register data will still be written to and read from connected devices correctly.
- Added Devices: LMK04368-EP, LMK04714-Q1, LMK04832-SEP, LMK5C33216A, LMK5C33414A, LMK61E2, LMKDB1108, LMKDB1120
- SMBus support implemented
- Improved I2C/SMBus address scan behavior when multiple peripheral addresses detected - user may choose from all identified addresses if more than one address found
- ScanI2CDevices API added to TICS Pro TCP server API (see TICSPro_TCP.py in install directory for documentation)
- LMK5B33216, LMK5B33414, LMK5C33216: New SYSREF/SYNC page and programming sequence generation improvements
- LMK04832, LMK04832-SP: Improved visual consistency and more descriptive warnings for invalid or suboptimal configurations
Release date: 20 Dec 2015
RF PLLs & synthesizers
Clock jitter cleaners & synchronizers
LMK01000EVAL — 1.6 GHz Low Noise Clock Buffer, Divider, and Distributor LMK03000CEVAL — Precision Clock Conditioner with Integrated VCO (1185 - 1296 MHz) LMK03001CEVAL — Precision Clock Conditioner with Integrated VCO (1470 - 1570 MHz) LMK03002CEVAL — Precision Clock Conditioner with Integrated VCO (1566 - 1724 MHz) LMK03033CEVAL — Precision Clock Conditioner with Integrated VCO (1843 - 2160 MHz) LMK03200EVAL — LMK03200 Family Precision 0-Delay Clock Conditioner with Integrated VCO Evaluation Board LMK04000BEVAL — Clock Jitter Cleaner With Cascaded PLLs and Integrated 1.2 GHz VCO (LVPECL LVCMOS Outputs) LMX25311226EVAL — High Performance Frequency Synthesizer System with Integrated VCO (592 - 634 MHz, 1184 - 1268 MHz)
The design resource accessed as www.ti.com/lit/zip/snac014 or www.ti.com/lit/xx/snac014e/snac014e.zip has been migrated to a new user experience at www.ti.com/tool/download/SNAC014. Please update any bookmarks accordingly.