1.6-GHz high performance clock buffer, divider, and distributor with 3 LVDS & 5 LVPECL outputs
Product details
Parameters
Package | Pins | Size
Features
Device | LVDS | LVPECL |
---|---|---|
LMK01000 | 3 | 5 |
LMK01010 | 8 | 0 |
LMK01020 | 0 | 8 |
Description
The LMK01000 family provides an easy way to divide and distribute high performance clock signals throughout the system. These devices provide best-in-class noise performance and are designed to be pin-to-pin and footprint compatible with LMK03000/LMK02000 family of precision clock conditioners.
The LMK01000 family features two programmable clock inputs (CLKin0 and CLKin1) that allow the user to dynamically switch between different clock domains.
Each device features 8 clock outputs with independently programmable dividers and delay adjustments. The outputs of the device can be easily synchronized by an external pin (SYNC*).
Target Applications
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | Fam LMK01000 Fam 1.6GHz HPer Clk Buffer, Divider and Distributor datasheet (Rev. G) | Oct. 15, 2009 |
User guide | LMK01000 Evaluation Board User's Guide (Rev. B) | Jul. 01, 2019 | |
Application note | AN-1821 CPRI Repeater System (Rev. A) | Apr. 26, 2013 | |
Application note | Phase Synchronization with Multiple Devices and Frequencies (Rev. A) | Apr. 26, 2013 | |
User guide | Clock Conditioner Owner's Manual | Nov. 10, 2006 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
The LMK01000 Evaluation Kit simplifies evaluation of the LMK01000 1.6 GHz High Performance Clock Buffer, Divider, and Distributor. The package consists of an Evaluation Board, Evaluation Board Instructions, and a cable for programming the device through a PC parallel port. CodeLoader 4 is the (...)
Software development
Features
- Program EVMs through the USB2ANY Interface Adaptor or onboard USB interface.
- Export programming configurations for use in end application.
Which software do I use?
Product | Loop (...) |
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
Features
- Accepts customer specific design requirements such as input frequencies, output frequencies, clock formats and clock counts
- Generates clock trees by taking into account a variety of advanced specifications, such as noise floor and phase determinism requirements
- Presents clear and intuitive block (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
WQFN (RHS) | 48 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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