Product details

Integrated VCO No Output frequency (Min) (MHz) 500 Output frequency (Max) (MHz) 6400 Normalized PLL phase noise (dBc/Hz) -227 Current consumption (mA) 60 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -120
Integrated VCO No Output frequency (Min) (MHz) 500 Output frequency (Max) (MHz) 6400 Normalized PLL phase noise (dBc/Hz) -227 Current consumption (mA) 60 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -120
WQFN (RTW) 24 16 mm² 4 x 4
  • –227-dBc/Hz Normalized PLL Noise
  • 500-MHz to 6.4-GHz Wideband PLL
  • 3.15-V to 5.25-V Charge Pump PLL Supply
  • Versatile Ramp / Chirp Generation
  • 200-MHz Maximum Phase Detector Frequency
  • FSK / PSK Modulation Pin
  • Digital Lock Detect
  • Single 3.3-V Supply Capability
  • –227-dBc/Hz Normalized PLL Noise
  • 500-MHz to 6.4-GHz Wideband PLL
  • 3.15-V to 5.25-V Charge Pump PLL Supply
  • Versatile Ramp / Chirp Generation
  • 200-MHz Maximum Phase Detector Frequency
  • FSK / PSK Modulation Pin
  • Digital Lock Detect
  • Single 3.3-V Supply Capability

The LMX2491 device is a low-noise, 6.4-GHz wideband delta-sigma fractional N PLL with ramp and chirp generation. It consists of a phase frequency detector, programmable charge pump, and high frequency input for the external VCO. The LMX2491 supports a broad and flexible class of ramping capabilities, including FSK, PSK, and configurable piecewise linear FM modulation profiles of up to 8 segments. It supports fine PLL resolution and fast ramp with up to a 200-MHz phase detector rate. The LMX2491 allows any of its registers to be read back. The LMX2491 can operate with a single 3.3-V supply. Moreover, supporting up to 5.25-V charge pump can eliminate the need of external amplifier, leading to a simpler solution with improved phase noise performance.

The LMX2491 device is a low-noise, 6.4-GHz wideband delta-sigma fractional N PLL with ramp and chirp generation. It consists of a phase frequency detector, programmable charge pump, and high frequency input for the external VCO. The LMX2491 supports a broad and flexible class of ramping capabilities, including FSK, PSK, and configurable piecewise linear FM modulation profiles of up to 8 segments. It supports fine PLL resolution and fast ramp with up to a 200-MHz phase detector rate. The LMX2491 allows any of its registers to be read back. The LMX2491 can operate with a single 3.3-V supply. Moreover, supporting up to 5.25-V charge pump can eliminate the need of external amplifier, leading to a simpler solution with improved phase noise performance.

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* Data sheet LMX2491 6.4-GHz Low Noise RF PLL With Ramp/Chirp Generation datasheet (Rev. A) 23 Jan 2017

Design & development

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Evaluation board

LMX2492EVM — LMX2492 Evaluation Module

The LMX2492EVM supports evaluation of the LMX2492 and LMX2492-Q1 which is an ultra-low noise 14 GHz wideband RF PLL with ramp/chirp generation, consisting of a delta-sigma fractional N PLL, phase detector, programmable 5V charge pump and high frequency divider for the VCO. The LMX2492 supports a (...)

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Application software & framework

PLLATINUMSIM-SW — Texas Instruments PLLatinum Simulator Tool

The PLLATINUMSIM-SW simulator tool lets you create detailed designs and simulations of our PLLATINUM™ integrated circuits which include the LMX series of PLLs and synthesizers.
Application software & framework

TICSPRO-SW — Texas Instruments Clocks and Synthesizers (TICS) Pro Software

The TICS Pro software is used to program the evaluation modules (EVMs) for device numbers with these prefixes: CDC, LMK and LMX. These devices include PLLs and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.
Design tool

CLOCK-TREE-ARCHITECT — Clock tree architect programming software

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
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