Ultra-low jitter clock generator with network synchronization and BAW technology
Product details
Parameters
Package | Pins | Size
Features
- One Digital Phase-Locked Loop (DPLL) With:
- Hitless Switching: ±50-ps Phase Transient
- Programmable Loop Bandwidth With Fastlock
- Standards-Compliant Synchronization and Holdover Using a Low-Cost TCXO/OCXO
- Two Analog Phase-Locked Loops (APLLs) With Industry-Leading Jitter Performance:
- 50-fs RMS Jitter at 312.5 MHz (APLL1)
- 125-fs RMS Jitter at 155.52 MHz (APLL2)
- Two Reference Clock Inputs
- Priority-Based Input Selection
- Digital Holdover on Loss of Reference
- Four Clock Outputs with Programmable Drivers
- Up to Four Different Output Frequencies
- AC-LVDS, AC-CML, AC-LVPECL, HCSL, and 1.8-V LVCMOS Output Formats
- EEPROM / ROM for Custom Clocks on Power-Up
- Flexible Configuration Options
- 1 Hz (1 PPS) to 800 MHz on Input
- XO/TCXO/OCXO Input: 10 to 100 MHz
- DCO Mode: < 0.001 ppb/Step for Precise Clock Steering (IEEE 1588 PTP Slave)
- Advanced Clock Monitoring and Status
- I2C or SPI Interface
- PSNR: –83 dBc (50-mVpp Noise on 3.3-V Supply)
- 3.3-V Supply With 1.8-V, 2.5-V, or 3.3-V Outputs
- Industrial Temperature Range: –40 °C to +85 °C
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Description
The LMK5B12204 is high-performance network synchronizer clock device that provides jitter cleaning, clock generation, advanced clock monitoring, and superior hitless switching performance to meet the stringent timing requirements of communications infrastructure and industrial applications. The ultra-low jitter and high power supply noise rejection (PSNR) of the device can reduce bit error rates (BER) in high-speed serial links.
The device can generate output clocks with 50-fs RMS jitter using TIs proprietary Bulk Acoustic Wave (BAW) VCO technology, independent of the jitter and frequency of the XO and reference inputs.
Technical documentation
Type | Title | Date | |
---|---|---|---|
* | Datasheet | LMK5B12204 Ultra-Low Jitter Network Synchronizer Clock With Two Frequency Domain datasheet (Rev. A) | Jan. 05, 2021 |
User guide | LMK5B12204 register programming manual | Jun. 04, 2020 | |
Application note | ITU-T G.8262 compliance test results for the LMK05318 (Rev. A) | Feb. 22, 2019 | |
Application note | Supported synchronization modes for TI network synchronizers (Rev. A) | Feb. 22, 2019 | |
Application note | Understanding clocking needs for high-speed 56G PAM-4 serial links (Rev. A) | Feb. 22, 2019 | |
White paper | TI BAW technology enables ultra-low jitter clocks for high-speed networks | Feb. 17, 2019 | |
Application note | How to use the LMK05318 as a jitter cleaner | Jan. 16, 2019 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.Hardware development
Description
Step 1: Buy the EVM
Step 2: Setup the default jumpers as shown in the user's guide
Step 3: Download TICS Pro and follow the EVM quick start instructions
This is an evaluation module (EVM) for the LMK05318B network synchronizer clock device.
The EVM can be used (...)
Features
- One Digital PLL (DPLL) with programmable bandwidths and two fractional analog PLLs (APLLs) for flexible clock generation
- Two reference inputs to the DPLL supporting hitless switching & holdover
- Eight output clocks with 50-fs RMS phase jitter (12 kHz to 20 MHz)
- On-chip EEPROM for custom start-up clock (...)
Software development
Design tools & simulation
Features
- Leverages Cadence PSpice Technology
- Preinstalled library with a suite of digital models to enable worst-case timing analysis
- Dynamic updates ensure you have access to most current device models
- Optimized for simulation speed without loss of accuracy
- Supports simultaneous analysis of multiple products
- (...)
CAD/CAE symbols
Package | Pins | Download |
---|---|---|
VQFN (RGZ) | 48 | View options |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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