AMIC110

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Sitara processor: Arm Cortex-A8, 10+ Ethernet protocols

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Product details

Parameters

Arm CPU 1 Arm Cortex-A8 Arm MHz (Max.) 300 Protocols CC-Link IEF Basic, EtherCAT, EtherNet/IP, PROFIBUS, PROFINET RT/IRT Serial I/O CAN, I2C, SPI, UART, USB Ethernet MAC 2-Port 10/100 PRU EMAC Co-processor(s) PRU-ICSS Operating temperature range (C) -40 to 105 DRAM DDR2, DDR3, DDR3L, LPDDR open-in-new Find other AMIC industrial Ethernet processors

Package | Pins | Size

NFBGA (ZCZ) 324 225 mm² 15 x 15 open-in-new Find other AMIC industrial Ethernet processors

Features

  • Up to 300-MHz Sitara™ ARM® Cortex®-A8 32‑Bit RISC Processor
    • NEON™ SIMD Coprocessor
    • 32KB of L1 Instruction and 32KB of Data Cache With Single-Error Detection (Parity)
    • 256KB of L2 Cache With Error Correcting Code (ECC)
    • 176KB of On-Chip Boot ROM
    • 64KB of Dedicated RAM
    • Emulation and Debug - JTAG
    • Interrupt Controller (up to 128 Interrupt Requests)
  • On-Chip Memory (Shared L3 RAM)
    • 64KB of General-Purpose On-Chip Memory Controller (OCMC) RAM
    • Accessible to All Masters
    • Supports Retention for Fast Wakeup
  • External Memory Interfaces (EMIF)
    • mDDR(LPDDR), DDR2, DDR3, DDR3L Controller:
      • mDDR: 200-MHz Clock (400-MHz Data Rate)
      • DDR2: 266-MHz Clock (532-MHz Data Rate)
      • DDR3: 400-MHz Clock (800-MHz Data Rate)
      • DDR3L: 400-MHz Clock (800-MHz Data Rate)
      • 16-Bit Data Bus
      • 1GB of Total Addressable Space
      • Supports One x16 or Two x8 Memory Device Configurations
    • General-Purpose Memory Controller (GPMC)
      • Flexible 8-Bit and 16-Bit Asynchronous Memory Interface With up to Seven Chip Selects (NAND, NOR, Muxed-NOR, SRAM)
      • Uses BCH Code to Support 4-, 8-, or 16-Bit ECC
      • Uses Hamming Code to Support 1-Bit ECC
    • Error Locator Module (ELM)
      • Used in Conjunction With the GPMC to Locate Addresses of Data Errors from Syndrome Polynomials Generated Using a BCH Algorithm
      • Supports 4-, 8-, and 16-Bit per 512-Byte Block Error Location Based on BCH Algorithms
  • Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-ICSS)
    • Supports Protocols such as EtherCAT®, PROFIBUS, PROFINET, EtherNet/IP™, and More
    • Two Programmable Real-Time Units (PRUs)
      • 32-Bit Load/Store RISC Processor Capable of Running at 200 MHz
      • 8KB of Instruction RAM With Single-Error Detection (Parity)
      • 8KB of Data RAM With Single-Error Detection (Parity)
      • Single-Cycle 32-Bit Multiplier With 64-Bit Accumulator
      • Enhanced GPIO Module Provides Shift-In/Out Support and Parallel Latch on External Signal
    • 12KB of Shared RAM With Single-Error Detection (Parity)
    • Three 120-Byte Register Banks Accessible by Each PRU
    • Interrupt Controller (INTC) for Handling System Input Events
    • Local Interconnect Bus for Connecting Internal and External Masters to the Resources Inside the PRU-ICSS
    • Peripherals Inside the PRU-ICSS:
      • One UART Port With Flow Control Pins, Supports up to 12 Mbps
      • One Enhanced Capture (eCAP) Module
      • Two MII Ethernet Ports that Support Industrial Ethernet, such as EtherCAT
      • One MDIO Port
  • Power, Reset, and Clock Management (PRCM) Module
    • Controls the Entry and Exit of Stand-By and Deep-Sleep Modes
    • Responsible for Sleep Sequencing, Power Domain Switch-Off Sequencing, Wake-Up Sequencing, and Power Domain Switch-On Sequencing
    • Clocks
      • Integrated 15- to 35-MHz High-Frequency Oscillator Used to Generate a Reference Clock for Various System and Peripheral Clocks
      • Supports Individual Clock Enable and Disable Control for Subsystems and Peripherals to Facilitate Reduced Power Consumption
      • Five ADPLLs to Generate System Clocks (MPU Subsystem, DDR Interface, USB and Peripherals [MMC and SD, UART, SPI, I2C], L3, L4, Ethernet, GFX [SGX530], LCD Pixel Clock (1))
    • Power
      • Two Nonswitchable Power Domains (Real-Time Clock [RTC], Wake-Up Logic [WAKEUP])
      • Three Switchable Power Domains (MPU Subsystem [MPU], SGX530 [GFX](1), Peripherals and Infrastructure [PER])
      • Implements SmartReflex™ Class 2B for Core Voltage Scaling Based On Die Temperature, Process Variation, and Performance (Adaptive Voltage Scaling [AVS])
      • Dynamic Voltage Frequency Scaling (DVFS)
  • Real-Time Clock (RTC)
    • Real-Time Date (Day-Month-Year-Day of Week) and Time (Hours-Minutes-Seconds) Information
    • Internal 32.768-kHz Oscillator, RTC Logic and 1.1-V Internal LDO
    • Independent Power-on-Reset (RTC_PWRONRSTn) Input
    • Dedicated Input Pin (EXT_WAKEUP) for External Wake Events
    • Programmable Alarm Can be Used to Generate Internal Interrupts to the PRCM (for Wakeup) or Cortex-A8 (for Event Notification)
    • Programmable Alarm Can be Used With External Output (PMIC_POWER_EN) to Enable the Power Management IC to Restore Non-RTC Power Domains
  • Peripherals
    • Up to Two USB 2.0 High-Speed DRD (Dual-Role Device) Ports With Integrated PHY
    • Up to Two Industrial Gigabit Ethernet MACs (10, 100, 1000 Mbps)
      • Integrated Switch
      • Each MAC Supports MII, RMII, RGMII, and MDIO Interfaces
      • Ethernet MACs and Switch Can Operate Independent of Other Functions
      • IEEE 1588v1 Precision Time Protocol (PTP)
    • Up to Two Controller-Area Network (CAN) Ports
      • Supports CAN Version 2 Parts A and B
    • Up to Two Multichannel Audio Serial Ports (McASPs)
      • Transmit and Receive Clocks up to 50 MHz
      • Up to Four Serial Data Pins per McASP Port With Independent TX and RX Clocks
      • Supports Time Division Multiplexing (TDM), Inter-IC Sound (I2S), and Similar Formats
      • Supports Digital Audio Interface Transmission (SPDIF, IEC60958-1, and AES-3 Formats)
      • FIFO Buffers for Transmit and Receive (256 Bytes)
    • Up to Six UARTs
      • All UARTs Support IrDA and CIR Modes
      • All UARTs Support RTS and CTS Flow Control
      • UART1 Supports Full Modem Control
    • Up to Two Master and Slave McSPI Serial Interfaces
      • Up to Two Chip Selects
      • Up to 48 MHz
    • Up to Three MMC, SD, SDIO Ports
      • 1-, 4- and 8-Bit MMC, SD, SDIO Modes
      • MMCSD0 has Dedicated Power Rail for 1.8‑V or 3.3-V Operation
      • Up to 48-MHz Data Transfer Rate
      • Supports Card Detect and Write Protect
      • Complies With MMC4.3, SD, SDIO 2.0 Specifications
    • Up to Three I2C Master and Slave Interfaces
      • Standard Mode (up to 100 kHz)
      • Fast Mode (up to 400 kHz)
    • Up to Four Banks of General-Purpose I/O (GPIO) Pins
      • 32 GPIO Pins per Bank (Multiplexed With Other Functional Pins)
      • GPIO Pins Can be Used as Interrupt Inputs (up to Two Interrupt Inputs per Bank)
    • Up to Three External DMA Event Inputs that can Also be Used as Interrupt Inputs
    • Eight 32-Bit General-Purpose Timers
      • DMTIMER1 is a 1-ms Timer Used for Operating System (OS) Ticks
      • DMTIMER4–DMTIMER7 are Pinned Out
    • One Watchdog Timer
    • 12-Bit Successive Approximation Register (SAR) ADC
      • 200K Samples per Second
      • Input can be Selected from any of the Eight Analog Inputs Multiplexed Through an 8:1 Analog Switch
    • Up to Three Enhanced High-Resolution PWM Modules (eHRPWMs)
      • Dedicated 16-Bit Time-Base Counter With Time and Frequency Controls
      • Configurable as Six Single-Ended, Six Dual-Edge Symmetric, or Three Dual-Edge Asymmetric Outputs
  • Device Identification
    • Contains Electrical Fuse Farm (FuseFarm) of Which Some Bits are Factory Programmable
      • Production ID
      • Device Part Number (Unique JTAG ID)
      • Device Revision (Readable by Host ARM)
  • Debug Interface Support
    • JTAG and cJTAG for ARM (Cortex-A8 and PRCM), PRU-ICSS Debug
    • Supports Device Boundary Scan
    • Supports IEEE 1500
  • DMA
    • On-Chip Enhanced DMA Controller (EDMA) has Three Third-Party Transfer Controllers (TPTCs) and One Third-Party Channel Controller (TPCC), Which Supports up to 64 Programmable Logical Channels and Eight QDMA Channels. EDMA is Used for:
      • Transfers to and from On-Chip Memories
      • Transfers to and from External Storage (EMIF, GPMC, Slave Peripherals)
  • Inter-Processor Communication (IPC)
    • Integrates Hardware-Based Mailbox for IPC and Spinlock for Process Synchronization Between Cortex-A8, PRCM, and PRU-ICSS
      • Mailbox Registers that Generate Interrupts
        • Four Initiators (Cortex-A8, PRCM, PRU0, PRU1)
      • Spinlock has 128 Software-Assigned Lock Registers
  • Boot Modes
    • Boot Mode is Selected Through Boot Configuration Pins Latched on the Rising Edge of the PWRONRSTn Reset Input Pin
  • Package:
    • 324-Pin S-PBGA-N324 Package
      (ZCZ Suffix), 0.80-mm Ball Pitch

(1)The GFX [SGX530] and LCD modules are not supported for this family of devices, but the "LCD" and "GFX" names are still present in some PLL, power domain, or supply voltage names.

All trademarks are the property of their respective owners.

open-in-new Find other AMIC industrial Ethernet processors

Description

The AMIC110 device is a multiprotocol programmable industrial communications processor providing ready-to-use solutions for most industrial Ethernet and fieldbus communications slaves, as well as some masters. The device is based on the ARM Cortex-A8 processor, peripherals, and industrial interface options. The devices support high-level operating systems (HLOS). Processor SDK Linux® and TI-RTOS are available free of charge from TI. Other RTOS are also offered by TI ecosystem partners. The AMIC110 microprocessor is an ideal companion communications chip to the C2000 family of microcontrollers for connected drives.

The AMIC110 microprocessor contains the subsystems shown in Figure 1-1 and a brief description of each follows:

The microprocessor unit (MPU) subsystem is based on the ARM Cortex-A8 processor. The PRU-ICSS is separate from the ARM core, allowing independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET IRT, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos III, and others. Additionally, the programmable nature of the PRU-ICSS, along with its access to pins, events and all system-on-chip (SoC) resources, provides flexibility in implementing fast, real-time responses, specialized data handling operations, custom peripheral interfaces, and in offloading tasks from the other processor cores of SoC.

open-in-new Find other AMIC industrial Ethernet processors
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Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 19
Type Title Date
* Datasheet AMIC110 Sitara™ SoC datasheet (Rev. D) Dec. 12, 2019
* Errata AMIC110 Sitara SoC Silicon Errata (Rev. 2.1) Jan. 03, 2017
White papers EtherCAT® on Sitara™ Processors (Rev. I) Jul. 28, 2020
White papers EtherNet/IP on TI's Sitara AM335x Processors (Rev. D) Jul. 28, 2020
White papers E-book: An engineer’s guide to industrial robot designs Feb. 12, 2020
User guides AM335x and AMIC110 Sitara™ Processors Technical Reference Manual (Rev. Q) Dec. 13, 2019
Technical articles Designing smarter remote terminal units for microgrids Oct. 02, 2019
Application notes AM335x EMIF Tools Sep. 20, 2019
Technical articles Security versus functional safety: a view from the Processor Software Development Kit May 31, 2019
User guides Powering AMIC110, AMIC120, AM335x, and AM437x with TPS65216 Apr. 11, 2019
Application notes Industrial Communication Protocols Supported on Sitara™ Processors (Rev. B) Jan. 21, 2019
White papers Ensuring real-time predictability (Rev. B) Dec. 04, 2018
Application notes PRU-ICSS EtherCAT Slave Troubleshooting Guide Nov. 07, 2018
White papers PROFINET on TI’s Sitara™ processors (Rev. D) Oct. 13, 2018
Technical articles Simplified software development through the Processor SDK and tools Oct. 02, 2018
White papers An inside look at industrial Ethernet communication protocols (Rev. B) Aug. 01, 2018
Technical articles Processor SDK: one for all and all for one Jun. 27, 2018
User guides Powering the AM335x With the TPS650250 (Rev. B) Mar. 14, 2018
White papers Connected sensors in industrial automation (Rev. B) Jun. 22, 2017

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
195
Description

The AMIC110 Industrial Communications Engine (ICE) is a development platform targeted at industrial communications and industrial ethernet in particular. Key to the AMIC110 ICE is the Sitara AMIC110 SoC that features ARM® Cortex™-A8 Processor along with the Programmable-Realtime Unit (...)

Features
  • AMIC110 SoC featuring Sitara™ ARM® Cortex®-A8 and PRU-ICSS
  • 512 MByte of DDR3 and 8 MByte of SPI flash
  • 2x 10/100 industrial ethernet connectors with external magnetics
  • 20-pin JTAG header to support all types of external emulator
  • RoHS and REACH compliant design
  • EMC-compliant, industrial temp dual port (...)

Software development

SOFTWARE DEVELOPMENT KITS (SDK) Download
Processor SDK for AMIC110 Sitara Processors – TI-RTOS Support
PROCESSOR-SDK-AMIC110 Processor SDK (Software Development Kit) is a unified software platform for TI embedded processors providing easy setup and fast out-of-the-box access to benchmarks and demos.  All releases of Processor SDK are consistent across TI’s broad portfolio, allowing developers to seamlessly (...)
Features

RTOS features

  • Full driver availability
  • File system
  • Bare metal secondary bootloader
  • Board support package
  • Demonstrations and examples
  • Host tools including Pin Mux and Clock Tree utilities
  • Code Composer Studio™ IDE for RTOS development
  • Documentation

The Processor SDK is free, and does not require any run-time (...)

DEBUG PROBES Download
XDS200 USB Debug Probe
TMDSEMU200-U The Spectrum Digital XDS200 is the first model of the XDS200 family of debug probes (emulators) for TI processors. The XDS200 family features a balance of low cost with good performance between the super low cost XDS110 and the high performance XDS560v2, while supporting a wide variety of standards (...)
295
Features

The XDS200 is the mid-range family of JTAG debug probes (emulators) for TI processors. Designed to deliver good performance and the most common features that place it between the low cost XDS110 and the high performance XDS560v2, the XDS200 is the balanced solution to debug TI microcontrollers (...)

DEBUG PROBES Download
XDS560v2 System Trace USB Debug Probe
TMDSEMU560V2STM-U The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

995
Features

XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

DEBUG PROBES Download
XDS560v2 System Trace USB & Ethernet Debug Probe
TMDSEMU560V2STM-UE The XDS560v2 System Trace is the first model of the XDS560v2 family of high-performance debug probes (emulators) for TI processors. The XDS560v2 is the highest performance of the XDS family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7).

The (...)

1495
Features
  • XDS560v2 is the latest variant of the XDS560 family of high-performance debug probes (emulators) for TI processors. With the fastest speeds and most features of the entire XDS family, XDS560v2 is the most comprehensive solution to debug TI microcontrollers, processors and wireless connectivity (...)

DRIVERS & LIBRARIES Download
PRU-ICSS Industrial Software for Sitara™ Processors
PRU-ICSS-INDUSTRIAL-SW The PRU-ICSS Protocols enables real-time industrial communications for TI Sitara processors.  The PRU-ICSS protocols are built to use on top of Processor-SDK-RTOS, TI’s unified software development platform, and contain optimized PRU-ICSS firmware, a corresponding PRU-ICSS driver for the (...)
Features
  • PRU-ICSS firmware binary images and driver sources
  • Third-party stacks and evaluation libraries
  • Scripts to generate CCS projects
  • Example application for evaluation
  • Documentation (release notes, protocol data sheets, user guides, porting guides, etc.)

Refer to the protocol datasheets and release notes of (...)

IDES, CONFIGURATION, COMPILERS & DEBUGGERS Download
Code Composer Studio (CCS) Integrated Development Environment (IDE) for Sitara ARM Processors
CCSTUDIO-SITARA

Code Composer Studio is an integrated development environment (IDE) that supports TI's Microcontroller and Embedded Processors portfolio. Code Composer Studio comprises a suite of tools used to develop and debug embedded applications. It includes an optimizing C/C++ compiler, source code editor (...)

IDES, CONFIGURATION, COMPILERS & DEBUGGERS Download
KUNBUS - A Single Source for Multiprotocol Industrial Communications
Provided by KUNBUS KUNBUS is a German-based company specializing in industrial communication and industrial automation. KUNBUS is the ideal partner for industrial communication because KUNBUS offers pre-certified protocol solutions on Sitara™ processors as well as a full suite of additional services to meet the (...)
Features
  • Full, pre-certified solutions based on Sitara™ processors
  • Years of industrial communciations expertise
  • Toolkits for master and slave development available
PROGRAMMING TOOLS Download
UniFlash stand-alone flash tool for microcontrollers, Sitara™; processors and SimpleLink™
UNIFLASH Supported devices: CC13xx, CC25xx, CC26xx, CC3x20, CC3x30, CC3x35, Tiva, C2000, MSP43x, Hercules, PGA9xx, IWR12xx, IWR14xx, IWR16xx, IWR18xx , IWR68xx, AWR12xx, AWR14xx, AWR16xx, AWR18xx.  Command line only: AM335x, AM437x, AM571x, AM572x, AM574x, AM65XX, K2G

CCS Uniflash is a standalone tool used to (...)

PROGRAMMING TOOLS Download
SPRCAJ0.ZIP (313 KB)

Design tools & simulation

SIMULATION MODELS Download
SPRM552C.ZIP (21721 KB) - IBIS Model
SIMULATION MODELS Download
SPRM607.ZIP (8 KB) - BSDL Model
CALCULATION TOOLS Download
Clock Tree Tool for Sitara, Automotive, Vision Analytics, & Digital Signal Processors
CLOCKTREETOOL The Clock Tree Tool (CTT) for Sitara™ ARM®, Automotive, and Digital Signal Processors is an interactive clock tree configuration software that provides information about the clocks and modules in these TI devices. It allows the user to:
  • Visualize the device clock tree
  • Interact with clock tree elements (...)
document-generic User guide
CALCULATION TOOLS Download
Pin mux tool
PINMUXTOOL The PinMux Utility is a software tool which provides a Graphical User Interface for configuring pin multiplexing settings, resolving conflicts and specifying I/O cell characteristics for TI MPUs. Results are output as C header/code files that can be imported into software development kits (SDKs) or (...)
CALCULATION TOOLS Download
Features

Power Estimation Tool (PET) provides users the ability to gain insight in to the power consumption of select TI processors. The tool includes the ability for the user to choose multiple application scenarios and understand the power consumption as well as how advanced power saving techniques can be (...)

ASSEMBLY DRAWINGS Download
SPRR280.ZIP (10806 KB)
BILL OF MATERIALS (BOM) Download
SPRR279.PDF (91 KB)
PCB LAYOUTS Download
SPRR276.PDF (636 KB)
PCB LAYOUTS Download
SPRR277.PDF (629 KB)
SCHEMATICS Download
SPRR278.ZIP (1897 KB)

Reference designs

REFERENCE DESIGNS Download
Ethernet/IP Communications Dev Platform
TIDEP0003 Targeted for Ethernet/IP slave communications, this development platform allows designers to mplement Ethernet/IP communications standards in a broad range of industrial automation equipment. It enables low foot print designs in applications such as industrial automation, factory automation or (...)
document-generic Schematic
REFERENCE DESIGNS Download
EtherCAT Slave and Multi-Protocol Industrial Ethernet Reference Design
TIDA-00299 This reference design implements a cost-optimized high EMC immunity EtherCAT slave (dual ports) with SPI-interface to the application processor. The hardware design is capable of supporting multi-protocol industrial ethernet and field-busses using the AMIC110 industrial communications processor. The (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
PRU Real-Time I/O Evaluation Reference Design
TIDEP0017 This reference design is a BeagleBone Black add-on board that allows users get to know TI’s powerful Programmable Real-Time Unit (PRU) core and basic functionality.  The PRU is a low-latency microcontroller subsystem integrated in the Sitara AM335x and AM437x family of devices.  The (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
DDR-less EtherCAT® Slave on AMIC110 Reference Design
TIDEP-0105 — EtherCAT® (Ethernet for Control Automation Technology) continuously grows to establish itself as a dominant, industrial, Ethernet network. The DDR-less EtherCAT reference design serves as a reference design for a completely new and low-cost, DDR-less, EtherCAT slave implementation on the (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
EtherCAT Communications Dev Platform
TIDEP0001 Targeted for EtherCAT slave communications, this development platform allows designers to implement real-time EtherCAT communications standards in a broad range of industrial automation equipment. It enables low foot print designs in applications such as industrial automation, factory automation or (...)
document-generic Schematic
REFERENCE DESIGNS Download
Certified Profinet IRT V2.3 Device with 1 GHz ARM Application Processor
TIDEP0029 Certified hardware and software components for Profinet IRT V2.3 device applications. This design integrates Industrial Ethernet Phys, Profinet IRT switch, Profinet IRT stack and application example in one package. Profinet is the leading Industrial Ethernet standard used by many Industrial segments (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
PROFINET Communications Dev Platform
TIDEP0008 Targeted for PROFINET slave communications, this development platform allows designers to implement PROFINET communications standards in a broad range of industrial automation equipment. It enables low foot print designs in applications such as industrial automation, factory automation or industrial (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
"Fast startup” feature of industrial Ethernet for AM335x
TIDEP0049 TI provides the system solution for integrated multi-protocol Industrial Ethernet Communication on Sitara processors. Fast start up after device power up has been defined by various industrial Ethernet standards. This TI design describes system level approach to support fast startup with TI Sitara (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
PROFIBUS Communications Development Platform
TIDEP0002 Targeted for PROFIBUS slave communications, this development platform allows designers to implement PROFIBUS communications standards in a broad range of industrial automation equipment. It enables low foot print designs in applications such as industrial automation, factory automation or industrial (...)
document-generic Schematic

CAD/CAE symbols

Package Pins Download
NFBGA (ZCZ) 324 View options

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