ECAP0 |
ECAP0_ecap_int_0 |
GICSS0_spi_IN_145 |
GICSS0 |
ECAP0 interrupt request |
pulse |
ECAP0 |
ECAP0_ecap_int_0 |
R5FSS0_CORE0_intr_IN_83 |
R5FSS0_CORE0 |
ECAP0 interrupt request |
pulse |
ECAP0 |
ECAP0_ecap_int_0 |
MCU_R5FSS0_CORE0_cpu0_intr_IN_83 |
MCU_R5FSS0_CORE0 |
ECAP0 interrupt request |
pulse |
ECAP0 |
ECAP0_ecap_int_0 |
C7X256V0_CLEC_gic_spi_IN_145 |
C7X256V0_CLEC |
ECAP0 interrupt request |
pulse |
ECAP0 |
ECAP0_ecap_int_0 |
C7X256V1_CLEC_gic_spi_IN_145 |
C7X256V1_CLEC |
ECAP0 interrupt request |
pulse |
ECAP0 |
ECAP0_ecap_int_0 |
TIFS0_nvic_IN_74 |
TIFS0 |
ECAP0 interrupt request |
pulse |
ECAP0 |
ECAP0_ecap_int_0 |
HSM0_nvic_IN_74 |
HSM0 |
ECAP0 interrupt request |
pulse |
ECAP1 |
ECAP1_ecap_int_0 |
GICSS0_spi_IN_146 |
GICSS0 |
ECAP1 interrupt request |
pulse |
ECAP1 |
ECAP1_ecap_int_0 |
R5FSS0_CORE0_intr_IN_84 |
R5FSS0_CORE0 |
ECAP1 interrupt request |
pulse |
ECAP1 |
ECAP1_ecap_int_0 |
MCU_R5FSS0_CORE0_cpu0_intr_IN_84 |
MCU_R5FSS0_CORE0 |
ECAP1 interrupt request |
pulse |
ECAP1 |
ECAP1_ecap_int_0 |
C7X256V0_CLEC_gic_spi_IN_146 |
C7X256V0_CLEC |
ECAP1 interrupt request |
pulse |
ECAP1 |
ECAP1_ecap_int_0 |
C7X256V1_CLEC_gic_spi_IN_146 |
C7X256V1_CLEC |
ECAP1 interrupt request |
pulse |
ECAP1 |
ECAP1_ecap_int_0 |
TIFS0_nvic_IN_75 |
TIFS0 |
ECAP1 interrupt request |
pulse |
ECAP1 |
ECAP1_ecap_int_0 |
HSM0_nvic_IN_75 |
HSM0 |
ECAP1 interrupt request |
pulse |
ECAP2 |
ECAP2_ecap_int_0 |
GICSS0_spi_IN_147 |
GICSS0 |
ECAP2 interrupt request |
pulse |
ECAP2 |
ECAP2_ecap_int_0 |
R5FSS0_CORE0_intr_IN_85 |
R5FSS0_CORE0 |
ECAP2 interrupt request |
pulse |
ECAP2 |
ECAP2_ecap_int_0 |
MCU_R5FSS0_CORE0_cpu0_intr_IN_85 |
MCU_R5FSS0_CORE0 |
ECAP2 interrupt request |
pulse |
ECAP2 |
ECAP2_ecap_int_0 |
C7X256V0_CLEC_gic_spi_IN_147 |
C7X256V0_CLEC |
ECAP2 interrupt request |
pulse |
ECAP2 |
ECAP2_ecap_int_0 |
C7X256V1_CLEC_gic_spi_IN_147 |
C7X256V1_CLEC |
ECAP2 interrupt request |
pulse |
ECAP2 |
ECAP2_ecap_int_0 |
TIFS0_nvic_IN_76 |
TIFS0 |
ECAP2 interrupt request |
pulse |
ECAP2 |
ECAP2_ecap_int_0 |
HSM0_nvic_IN_76 |
HSM0 |
ECAP2 interrupt request |
pulse |