SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
Continuous transfers are allowed manually by keeping the SPIEN_[n] signal active for successive MCSPI words transfer. Several sequences (configuration/enable/disable of the channel) can be run without deactivating the SPIEN_[n] line. This mode is supported by all channels and any controller sequence can be used (transmit-receive, transmit-only, receive-only).
Keeping the SPIEN_[n] active mode is supported when:
The state of the SPIEN_[n] signal is programmable:
When the channel is enabled, the SPIEN_[n] signal activates with the programmed polarity. As in the multichannel controller mode, the transfer start depends on the status of the MCSPI_TXi register (the MCSPI_CHiSTAT[1] TXS bit), the status of the MCSPI_RXi register (the MCSPI_CHiSTAT[1] RXS bit), and the defined mode (the MCSPI_CHiCONF[13-12] TRM bit field) of the channel enabled.
The MCSPI_CHiSTAT[2] EOT bit gives the transfer status of each MCSPI word. The RXx_FULL bit in the MCSPI_IRQSTATUS register is set when received data is loaded from the shift register to the MCSPI_RXi register.
A change in the configuration parameters is propagated directly on the MCSPI interface. If the SPIEN_[n] signal is activated, ensure that the configuration is changed only between MCSPI words to avoid corrupting the current transfer.
To avoid data corruption, SPIEN_[n] polarity and SPICLK phase and SPICLK polarity must not be modified when the SPIEN_[n] signal is activated.
A delay between MCSPI words that requires the connected MCSPI peripheral device to switch from one configuration to another (for instance, from transmit-only to receive-only) must be handled by software.
At the end of the last MCSPI word, the channel must be deactivated (the MCSPI_CHiCTRL[0] EN bit set to 0) and SPIEN_[n] can be forced to its INACTIVE state using the MCSPI_CHiCONF[20] FORCE bit.
Figure 12-37 and Figure 12-38 show successive transfers with SPIEN_[n] maintained active low with a different configuration for each MCSPI word in single-data-pin and dual-data-pin interface modes, respectively.
The SPIEN_[n] signal can be maintained active via software using the MCSPI_CHiCONF[20] FORCE bit only when the MCSPI_MODULCTRL[0] SINGLE bit is set to 0x1.