SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
Timing registers are programmed as follows for NAND flash boot:
GPMC register | Value |
---|---|
GPMC_CONFIG1 | 0x00000812 |
GPMC_CONFIG2 | 0x00080b00 |
GPMC_CONFIG3 | 0x22080810 |
GPMC_CONFIG4 | 0x05006890 |
GPMC_CONFIG5 | 0x0107080b |
GPMC_CONFIG6 | 0x80000180 |
GPMC_CONFIG7 | 0x00000f50 |
GPMC NAND boot only supports boot from ONFI 1.0 compatible 8 bit parallel NAND memory up to 2Gbytes in size connected to GPMC CS0 with the following geometries:
GPMC is setup to comply with mode 0 timing for NAND flash.