SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
The auto clock gating feature of WKUP domain peripherals is enabled by default.
The disabling of auto clock gating may result in improved performance.
The auto clock gating control can be modified during device initialization time through registers CLKGATE_CTRL0 and CLKGATE_CTRL1 in the WKUP_CTRL_MMR domain.