SPRUJB3 March 2024 AM67 , AM67A , TDA4AEN-Q1 , TDA4VEN-Q1
The peripheral transmit-only mode is programmable (set the MCSPI_CH0CONF[13-12] TRM bit field to 0x2) and avoids the requirement for the processor to read the MCSPI_RX0 register (minimizing data movement) only when transmission is meaningful.
To use the MCSPI as a peripheral transmit-only device, the RX0_FULL and RX0_OVERFLOW interrupts and DMA read requests must be disabled due to the state of the MCSPI_RX0 register.
When the MCSPI word transfer completes, the MCSPI_CH0STAT[2] EOT bit is set.
Figure 12-41 shows a half-duplex system with a controller device on the left and a transmit-only peripheral device on the right. Each time a bit transfers out from the peripheral, 1 bit transfers in the controller. After eight cycles of the serial clock SPICLK, WordB transfers from the peripheral to the controller.