SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Table 5-1361 shows the state of global clocks in each low power mode.
Power Modes | Clocks | ||
---|---|---|---|
WKUP_HFOSC0 | HFOSC1 (if running) | DPLLs | |
SoC-OFF | OFF | OFF | OFF |
SuspendToRAM | OFF | OFF | OFF |
DeepSleep | OFF | OFF | OFF |
MCU-ONLY | ON | ON | Single DPLL locked |
CPD-OFF | ON | ON | Single DPLL locked |
Standby | ON | ON | Bypass/Low Frequency |