SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Packet transmission is accomplished within the UDMA by moving data from structures that are located in memory via the VBUSM Memory Interface(s) onto the Transmit PSI-L Interface. On the Tx side of the UDMA, these transfers are always reads. Data is read from an attached memory mapped space and packed into the Rx Per Channel Buffer for that channel. At a later time, the data is moved from the Tx Per Channel FIFO to a remote peer DMA entity via the Tx PSI-L interface.