SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Each temperature-monitor register group of VTM can be configured to sample the temperature of its corresponding temperature monitor and trigger up to 3 alert (level) signals:
The following inequality shall always be valid: THPT2 > THPT1 > THPT0.
The device also supports absolute maximum alert (when the die temperature exceeds the programmed temperature in WKUP_VTM_MISC_CTRL2[9-0] MAXT_OUTRG_ALERT_THR) - THERM_MAXTEMP_OUTRANGE_ALERT. For more information about how to handle it, see Section 5.2.2.2.5.3.7.1, VTM Maximum Temperature Outrange Alert.
The level interrupts can be used as follows:
LT_TH0_INT, if enabled, will get triggered always when the temperature being read is less than THPT0, regardless of whether GT_TH1_INT and GT_TH2_INT are enabled, or have ever been triggered. And therefore if LT_TH0_INT has to be generated, then firmware/software is responsible to enable the LT_TH0_INT only as part of the interrupt service routine of GT_TH1_INT and GT_TH2_INT. Otherwise it will keep triggering when is not needed.
Each voltage-domain register group can be set to enable and generate the 3 interrupts related to that particular voltage domain. For enabling and disabling the three types of interrupts see the corresponding group of registers:
All 3 alerts from the temperature monitors are available as inputs of the mask and alert merging logic block of each voltage domain, such that the temperature monitors that are relevant to each voltage domain can be selected as the contributors to the generation of the 3 combined interrupts in each voltage domain. This logic is presented in Figure 5-658. The THERM_MAXTEMP_OUTRANGE_ALERT is not shown in this figure. Notice that the same temperature sensor can contribute to more than one voltage domain and each voltage domain can have multiple sensors contributing to the interrupt generation in that VD, see WKUP_VTM_VD_EVT_SET_j and WKUP_VTM_VD_EVT_CLR_j registers.
The VTM in this device has 3 temperature sensors.
The interrupts need to be active even when the functional clock is off. In this mode they will be driven by the sensor clock.
The interrupts are only active when the sensor is in continuous mode. A one-shot sampling of the sensor will not trigger any interrupts.
Table 5-1338 shows the connection of VTM TEMPSENSOR registers groups to monitored subsystems.
Register Group | Voltage Domain | Monitored Subsystem |
WKUP_VTM_TMPSENS_*_0 | MCU | Sensor near MCU_R5FSS |
WKUP_VTM_TMPSENS_*_1 | MAIN | Sensor near LPDDR4 and A72 region |
WKUP_VTM_TMPSENS_*_2 | MAIN | Sensor near main R5FSS, PLL clustering |
WKUP_VTM_TMPSENS_*[7-3] | - | Not used |
There are only 3 interrupts that come out of the VTM module: THERM_LVL_LT_TH0_INTR, THERM_LVL_GT_TH1_INTR, THERM_LVL_GT_TH2_INTR. The interrupt contributions of the voltage domain groups are ORed together to only produce the 3 interrupts that go out. Once an interrupt is detected via DMSC, Compute Cluster, or a R5FSS, the firmware/software will check which of the voltage domains is the source of the interrupt.
Software shall read the corresponding flags in each of the connected voltage domains to identify which voltage domain is active.