SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Table 10-512 lists the memory-mapped registers for the NAVSS0_SEC_PROXY0_CFG_RT. All register offset addresses not listed in Table 10-512 should be considered as reserved locations and the register contents should not be modified.
Sec Proxy Realtime Region.
Instance | Base Address |
---|---|
NAVSS0_SEC_PROXY0_CFG_RT | 3240 0000h |
MCU_NAVSS0_SEC_PROXY0_CFG_RT | 2A38 0000h |
Offset | Acronym | Register Name | NAVSS0_SEC_PROXY0_CFG_RT Physical Address | MCU_NAVSS0_SEC_PROXY0_CFG_RT Physical Address |
---|---|---|---|---|
0h + formula | SEC_PROXY_STATUS_j | Status Register | 3240 0000h + formula | 2A38 0000h + formula |
4h + formula | SEC_PROXY_THR_j | Threshold Register | 3240 0004h + formula | 2A38 0004h + formula |
SEC_PROXY_STATUS_j is shown in Figure 10-189 and described in Table 10-514.
Return to Summary Table.
The Status Register gives status for proxy thread j.
Offset =0h + (j * 1000h); where
j = 0h to 9Fh for NAVSS0_SEC_PROXY0_CFG_RT
j = 0h to 59h for MCU_NAVSS0_SEC_PROXY0_CFG_RT
Instance | Physical Address |
---|---|
NAVSS0_SEC_PROXY0_CFG_RT | 3240 0000h + formula |
MCU_NAVSS0_SEC_PROXY0_CFG_RT | 2A38 0000h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
ERROR | DIR | RESERVED | |||||
R/W-0h | R-0h | R/W-X | |||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
MAX_CNT | |||||||
R/W-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
R/W-X | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CUR_CNT | |||||||
R-0h | |||||||
LEGEND: R = Read Only; R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31 | ERROR | R/W | 0h | Error detected on proxy thread. The error will also use the err_evt field to generate an error event which can generate an interrupt. While in error a proxy thread will not process any operations. Write a 0 to clear the error and reset the proxy thread. |
30 | DIR | R | 0h |
Direction for the
proxy thread. |
29-24 | RESERVED | R/W | X | |
23-16 | MAX_CNT | R | 0h |
Max message count allowed for an outbound proxy thread. |
15-8 | RESERVED | R/W | X | |
7-0 | CUR_CNT | R | 0h | Current message count for the proxy thread. For an inbound proxy this is the number of available messages. For an outbound proxy this is the number of free messages that can be written. |
SEC_PROXY_THR_j is shown in Figure 10-190 and described in Table 10-516.
Return to Summary Table.
The Threshold Register controls the threshold for proxy thread j events.
Offset =4h + (j * 1000h); where
j = 0h to 9Fh for NAVSS0_SEC_PROXY0_CFG_RT
j = 0h to 59h for MCU_NAVSS0_SEC_PROXY0_CFG_RT
Instance | Physical Address |
---|---|
NAVSS0_SEC_PROXY0_CFG_RT | 3240 0004h + formula |
MCU_NAVSS0_SEC_PROXY0_CFG_RT | 2A38 0004h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | THR_CNT | ||||||||||||||||||||||||||||||
R/W-X | R/W-0h | ||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-8 | RESERVED | R/W | X | |
7-0 | THR_CNT | R/W | 0h | Threshold count that causes proxy thread events. For an outbound proxy this will be the number of free messages to cause an event. For an inbound proxy this will be the number of available messages to cause an event. |