SPRUIU1C July 2020 – February 2024 DRA821U , DRA821U-Q1
Immediate Command Register is implemented in order to allow the application processor to issue immediate command which has a higher priority over the ordinary command. The immediate commands are supposed to be used in exceptional cases and only CCC commands are applicable. The I3C supports only one immediate command at a time and it is accessed by the host through two APB registers: I3C_IMD_CMD0 and I3C_IMD_CMD1. If a normal command is currently being executed and new immediate command is loaded, then controller waits to finish the current command and after that starts executing the higher priority command regardless of the content of the ordinary command FIFO. Immediate command can be used only for CCC commands and the corresponding payload must not exceed 4 bytes. As a result the GETPID and DEVSLVS CCC commands cannot be executed using immediate commands. The format for the immediate command words is the same as for the ordinary commands, although some fields are reserved since not used or fixed for CCC commands (writing to these fields has no effect).