Top

Product details

Parameters

Function Fanout Additive RMS jitter (Typ) (fs) 51 Output frequency (Max) (MHz) 3100 Number of outputs 9 VCC out (V) 2.5, 3.3 VCC core (V) 3.3 Output skew (ps) 50 Features Pin programmable Operating temperature range (C) -40 to 85 Rating Catalog Output type HCSL, LVCMOS, LVDS, LVPECL Input type CML, HCSL, HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL, XTAL open-in-new Find other Clock buffers

Package | Pins | Size

WQFN (RTA) 40 36 mm² 6 x 6 open-in-new Find other Clock buffers

Features

  • 3:1 Input Multiplexer:
    • Two Universal Inputs Operate up to 3.1 GHz and Accept LVPECL, LVDS, CML, SSTL, HSTL, HCSL, or Single-Ended Clocks
    • One Crystal Input Accepts a 10 to 40 MHz Crystal or Single-Ended Clock
  • Two Banks with 4 Differential Outputs Each:
    • LVPECL, LVDS, HCSL, or Hi-Z (Selectable Per Bank)
    • LVPECL Additive Jitter with LMK03806 Clock Source at 156.25 MHz:
      • 20 fs RMS (10 kHz to 1 MHz)
      • 51 fs RMS (12 kHz to 20 MHz)
  • High PSRR: -65 / -76 dBc (LVPECL/LVDS) at 156.25 MHz
  • LVCMOS Output with Synchronous Enable Input
  • Pin-Controlled Configuration
  • VCC Core Supply: 3.3 V ± 5%
  • 3 Independent VCCO Output Supplies: 3.3 V/2.5 V ± 5%
  • Industrial Temperature Range: -40°C to +85°C
  • 40-lead WQFN (6 mm × 6 mm)

All trademarks are the property of their respective owners.

open-in-new Find other Clock buffers

Description

The LMK00308 is a 3-GHz, 8-output differential fanout buffer intended for high-frequency, low-jitter clock/data distribution and level translation. The input clock can be selected from two universal inputs or one crystal input. The selected input clock is distributed to two banks of 4 differential outputs and one LVCMOS output. Both differential output banks can be independently configured as LVPECL, LVDS, or HCSL drivers, or disabled. The LVCMOS output has a synchronous enable input for runt-pulse-free operation when enabled or disabled. The LMK00308 operates from a 3.3 V core supply and 3 independent 3.3 V/2.5 V output supplies.

The LMK00308 provides high performance, versatility, and power efficiency, making it ideal for replacing fixed-output buffer devices while increasing timing margin in the system.

open-in-new Find other Clock buffers
Download
Similar products you might be interested in
open-in-new Compare products
Similar but not functionally equivalent to the compared device:
CDCLVD1208 ACTIVE Low Jitter, 2-Input Selectable 1:8 Universal-to-LVDS Buffer Low jitter,1:8 LVDS fan out buffer
CDCLVP1208 ACTIVE Low Jitter, 2-Input Selectable 1:8 Universal-to-LVPECL Buffer Low jitter, 1:8 LVPECL fan out buffer
CDCUN1208LP ACTIVE Ultra Low Power, 2:8 Fan-out Buffer with Universal Inputs and Outputs Low additive jitter, 1:8 Universal buffer with edge rate control

Technical documentation

= Featured
No results found. Please clear your search and try again. View all 4
Type Title Date
* Datasheet LMK00308 3-GHz 8-Output Ultra-Low Additive Jitter Differential Clock Buffer/Level Translator datasheet (Rev. D) Mar. 28, 2016
Application notes Clocking for Medical Ultrasound Systems Sep. 20, 2017
Selection guides Clock & Timing Solutions (Rev. C) Jan. 19, 2017
User guides LMK00308 Evaluation Module User Guide Mar. 06, 2012

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
$299.00
Description

The LMK00308 Evaluation Board allows functional and performance verification of the LMK00308 high-performance 8-output differential clock buffer device.

Features
  • Low-noise clock fan-out with two banks of four differential outputs each and one LVCMOS output
  • Selectable differential output type (LVPECL, LVDS, HCSL, or Hi-Z), selectable per bank via control pins
  • 3:1 input multiplexer with two universal input buffers and one crystal oscillator interface, selectable (...)

Software development

APPLICATION SOFTWARE & FRAMEWORKS Download
Clock Design Tool - Loop Filter & Device Configuration + Simulation
CLOCKDESIGNTOOL The Clock Design Tool software helps with part selection, loop filter design and simulation of timing device solutions. When you enter desired output frequencies and a reference frequency (optional), the tool provides TI devices to meet the specified requirements, divider values and a recommended (...)

Design tools & simulation

SIMULATION MODELS Download
SNAM050A.ZIP (109 KB) - IBIS Model

CAD/CAE symbols

Package Pins Download
WQFN (RTA) 40 View options

Ordering & quality

Support & training

TI E2E™ forums with technical support from TI engineers

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos

Selection of Key Components (ADC, Signal Conditioning Amplifier) for AC Analog Input Module (AIM)

Understand some of the key criteria for selection of ADC, Signal Conditioning Amplifier and TI focus products for AC Analog Input Module.

Posted: 15-Jan-2017
Duration: 12:30

Related videos