Product details

Integrated VCO No Output frequency (min) (MHz) 500 Output frequency (max) (MHz) 2600 Normalized PLL phase noise (dBc/Hz) -210 Current consumption (mA) 3.9 Features Cycle slip reduction, Delta-sigma modulation, Dual PLL, Fastlock, Integrated timeout counter, On-chip input frequency doubler 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -104 Rating Catalog Operating temperature range (°C) -40 to 85 Lock time (µs) (typ) Loop BW dependent
Integrated VCO No Output frequency (min) (MHz) 500 Output frequency (max) (MHz) 2600 Normalized PLL phase noise (dBc/Hz) -210 Current consumption (mA) 3.9 Features Cycle slip reduction, Delta-sigma modulation, Dual PLL, Fastlock, Integrated timeout counter, On-chip input frequency doubler 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -104 Rating Catalog Operating temperature range (°C) -40 to 85 Lock time (µs) (typ) Loop BW dependent
ULGA (NPF) 24 15.75 mm² 3.5 x 4.5
  • Low In-Band Phase Noise and Low Fractional Spurs
  • 12 Bit or 22 Bit Selectable Fractional Modulus
  • Up to 4th Order Programmable Delta-Sigma Modulator
  • Enhanced Anti-Cycle Slip Fastlock Circuitry
    • Fastlock
    • Cycle Slip Reduction
    • Integrated Timeout Counters
  • Digital Lock Detect Output
  • Prescalers Allow Wide Range of N Values
    • RF PLL: 16/17/20/21
    • IF PLL: 8/9 or 16/17
  • Crystal Reference Frequency up to 110 MHz
  • On-chip Crystal Reference Frequency Doubler.
  • Phase Comparison Frequency up to 30 MHz
  • Hardware and Software Power-down Control
  • Ultra Low Consumption: ICC = 4.1 mA (Typical)

All trademarks are the property of their respective owners.

  • Low In-Band Phase Noise and Low Fractional Spurs
  • 12 Bit or 22 Bit Selectable Fractional Modulus
  • Up to 4th Order Programmable Delta-Sigma Modulator
  • Enhanced Anti-Cycle Slip Fastlock Circuitry
    • Fastlock
    • Cycle Slip Reduction
    • Integrated Timeout Counters
  • Digital Lock Detect Output
  • Prescalers Allow Wide Range of N Values
    • RF PLL: 16/17/20/21
    • IF PLL: 8/9 or 16/17
  • Crystal Reference Frequency up to 110 MHz
  • On-chip Crystal Reference Frequency Doubler.
  • Phase Comparison Frequency up to 30 MHz
  • Hardware and Software Power-down Control
  • Ultra Low Consumption: ICC = 4.1 mA (Typical)

All trademarks are the property of their respective owners.

The LMX2470 is a low power, high performance delta-sigma fractional-N PLL with an auxiliary integer-N PLL. The device is fabricated using TI’s advanced BiCMOS process.

With delta-sigma architecture, fractional spur compensation is achieved with noise shaping capability of the delta-sigma modulator and the inherent low pass filtering of the PLL loop filter. Fractional spurs at lower frequencies are pushed to higher frequencies outside the loop bandwidth. Unlike analog compensation, the digital feedback techniques used in the LMX2470 are highly resistant to changes in temperature and variations in wafer processing. With delta-sigma architecture, the ability to push close in spur and phase noise energy to higher frequencies is a direct function of the modulator order. The higher the order, the more this energy can be spread to higher frequencies. The LMX2470 has a programmable modulator up to order four, which allows the designer to select the optimum modulator order to fit the phase noise, spur, and lock time requirements of the system.

Programming is fast and simple. Serial data is transferred into the LMX2470 via a three line MICROWIRE interface (Data, Clock, Load Enable). Nominal supply voltage is 2.5 V. The LMX2470 features a typical current consumption of 4.1 mA at 2.5 V. The LMX2470 is available in a 24 lead 3.5 X 4.5 X 0.6 mm package.

The LMX2470 is a low power, high performance delta-sigma fractional-N PLL with an auxiliary integer-N PLL. The device is fabricated using TI’s advanced BiCMOS process.

With delta-sigma architecture, fractional spur compensation is achieved with noise shaping capability of the delta-sigma modulator and the inherent low pass filtering of the PLL loop filter. Fractional spurs at lower frequencies are pushed to higher frequencies outside the loop bandwidth. Unlike analog compensation, the digital feedback techniques used in the LMX2470 are highly resistant to changes in temperature and variations in wafer processing. With delta-sigma architecture, the ability to push close in spur and phase noise energy to higher frequencies is a direct function of the modulator order. The higher the order, the more this energy can be spread to higher frequencies. The LMX2470 has a programmable modulator up to order four, which allows the designer to select the optimum modulator order to fit the phase noise, spur, and lock time requirements of the system.

Programming is fast and simple. Serial data is transferred into the LMX2470 via a three line MICROWIRE interface (Data, Clock, Load Enable). Nominal supply voltage is 2.5 V. The LMX2470 features a typical current consumption of 4.1 mA at 2.5 V. The LMX2470 is available in a 24 lead 3.5 X 4.5 X 0.6 mm package.

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Technical documentation

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Type Title Date
* Data sheet LMX2470 2.6 GHz Delta-Sigma Fractional-N PLL with 800 MHz Integer-N PLL datasheet (Rev. B) 06 Mar 2013
Application note AN-1879 Fractional N Frequency Synthesis (Rev. B) 18 Nov 2021
User guide USB Interface Board for use with LMK and LMX User Guide 27 Jan 2012
User guide 2.6 GHz Delta-Sigma Fractional-N PLL with 800 MHz Integer-N PLL 26 Jan 2012
Application note Delta Sigma PLLs Raise The Standard For Performance 05 Mar 2003

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Application software & framework

PLLATINUMSIM-SW — Texas Instruments PLLatinum Simulator Tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.
IDE, configuration, compiler or debugger

CODELOADER — CodeLoader Software for device register programming

The CodeLoader 4 software is used to program the LMX PLLs and LMK timing devices through either the USB or line print terminal (LPT) port of a computer. This software also provides information on how to program the device by showing the bits that are actually sent.


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