제품 상세 정보

Frequency (max) (MHz) 28000 Frequency (min) (MHz) 5 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Phase synchronization, Programmable output power, SYSREF support (Compliant to JESD204B standard), Space grade Current consumption (mA) 360 Integrated VCO Yes Operating temperature range (°C) 25 to 25 Rating Space Lock time (µs) (typ) (s) Loop BW dependent
Frequency (max) (MHz) 28000 Frequency (min) (MHz) 5 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Phase synchronization, Programmable output power, SYSREF support (Compliant to JESD204B standard), Space grade Current consumption (mA) 360 Integrated VCO Yes Operating temperature range (°C) 25 to 25 Rating Space Lock time (µs) (typ) (s) Loop BW dependent
HTQFP (PAP) 64 144 mm² 12 x 12
  • SMD 5962R2321001PXE
    • Total ionizing dose 100Krad (ELDRS-free)
    • Single event latch-up (SEL) immune up to 75MeV-cm2/mg
    • Single event functional interrupt (SEFI) immune up to 75MeV-cm2/mg
  • Wide band frequency synthesizer : 5MHz to 28GHz output frequency
  • –101dBc/Hz phase noise at 100kHz offset with 24GHz carrier
  • 60fs RMS jitter at 24GHz (1kHz to 300MHz)
  • Programmable output power
  • PLL key specifications:
    • Figure of merit: –236dBc/Hz
    • Normalized 1/f noise: –129dBc/Hz
    • Up to 200MHz phase detector frequency
  • Synchronization of output phase across multiple devices
  • Independent mute pins for RFoutA and RFoutB with 200ns mute/unmute time
  • Support for SYSREF with 9ps resolution programmable delay
  • 3.3V single power supply operation
  • Pin-mode: Pin configurable N divider and output divider in Integer PLL mode
  • 10 × 10mm² 64 lead QFP package
  • Operating temperature range: –55°C to +125°C
  • Supported by PLLatinum™ Simulator design tool
  • SMD 5962R2321001PXE
    • Total ionizing dose 100Krad (ELDRS-free)
    • Single event latch-up (SEL) immune up to 75MeV-cm2/mg
    • Single event functional interrupt (SEFI) immune up to 75MeV-cm2/mg
  • Wide band frequency synthesizer : 5MHz to 28GHz output frequency
  • –101dBc/Hz phase noise at 100kHz offset with 24GHz carrier
  • 60fs RMS jitter at 24GHz (1kHz to 300MHz)
  • Programmable output power
  • PLL key specifications:
    • Figure of merit: –236dBc/Hz
    • Normalized 1/f noise: –129dBc/Hz
    • Up to 200MHz phase detector frequency
  • Synchronization of output phase across multiple devices
  • Independent mute pins for RFoutA and RFoutB with 200ns mute/unmute time
  • Support for SYSREF with 9ps resolution programmable delay
  • 3.3V single power supply operation
  • Pin-mode: Pin configurable N divider and output divider in Integer PLL mode
  • 10 × 10mm² 64 lead QFP package
  • Operating temperature range: –55°C to +125°C
  • Supported by PLLatinum™ Simulator design tool

The LMX2624-SP is a high performance wideband phase-locked loop (PLL) with integrated voltage controlled oscillator (VCO) and voltage regulators that can output any frequency from 5MHz and 28GHz. The VCO on this device covers an entire octave so the frequency coverage is complete down to 5MHz. The high performance PLL with a figure of merit of –236dBc/Hz and high phase detector frequency can attain very low in-band noise and integrated jitter.

The LMX2624-SP allows users to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in use cases including the one with fractional engine or output divider enabled. The device also adds support for either generating or repeating SYSREF (compliant to JESD204B/C standard), making the device designed for low-noise clock source for high-speed data converters.

This device is fabricated in Texas Instruments’ advanced BiCMOS process and is available in a 64-lead QFP plastic package.

The LMX2624-SP is a high performance wideband phase-locked loop (PLL) with integrated voltage controlled oscillator (VCO) and voltage regulators that can output any frequency from 5MHz and 28GHz. The VCO on this device covers an entire octave so the frequency coverage is complete down to 5MHz. The high performance PLL with a figure of merit of –236dBc/Hz and high phase detector frequency can attain very low in-band noise and integrated jitter.

The LMX2624-SP allows users to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in use cases including the one with fractional engine or output divider enabled. The device also adds support for either generating or repeating SYSREF (compliant to JESD204B/C standard), making the device designed for low-noise clock source for high-speed data converters.

This device is fabricated in Texas Instruments’ advanced BiCMOS process and is available in a 64-lead QFP plastic package.

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관심 가지실만한 유사 제품

open-in-new 대안 비교
비교 대상 장치와 유사한 기능
LMK04832-SP 활성 RHA(방사선 경화 보장), 초저잡음, 3.2GHz, 15출력 클록 지터 클리너 Jitter cleaner to provide clock to the synthesizer.
LMX1906-SP 활성 SYSREF 및 FPGA 클록이 포함되어 있는 방사능 내성 강화 보장(RHA) 15GHz 버퍼, 멀티플라이어 및 디바이더 RF buffer to fan out the clock from the synthesizer.
LMX2615-SP 활성 위상 동기화 및 JESD204B를 지원하는 우주 공간 등급 40MHz~15GHz 광대역 신시사이저 New variant with 28GHz max output frequency.

기술 자료

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4개 모두 보기
상위 문서 유형 직함 형식 옵션 날짜
* Data sheet LMX2624-SP 5MHz to 28GHz Wideband Synthesizer With Phase Synchronization and JESD204B/C Support datasheet PDF | HTML 2024/12/13
Application brief Allan Deviation Measurement Data from LMX2615 2025/06/26
Application brief Full Assist Feature in LMX2624 2025/05/27
Selection guide TI Space Products (Rev. K) 2025/04/04

설계 및 개발

추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.

평가 보드

LMX2624SPEVM — LMX2624-SP evaluation module

LMX2624-SP evaluation module (EVM) is used to evaluate the performance of the LMX2624-SP device. This device is a space grade RF synthesizer in 10mm x 10mm 64-pin plastic package. LMX2624-SP is able to generate continuous wave signal up to 26GHz. This EVM provides a hardware interface to enable (...)

사용 설명서: PDF | HTML
TI.com에서 구매할 수 없음
지원 소프트웨어

TICSPRO-SW TICS Pro GUI and Live Programming Tool for Clocking Devices

Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.

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지원되는 제품 및 하드웨어

다운로드 옵션
설계 툴

CLOCK-TREE-ARCHITECT — 클록 트리 아키텍트 프로그래밍 소프트웨어

클록 트리 아키텍트는 시스템 요구 사항에 따라 클록 트리 솔루션을 생성하여 설계 프로세스를 간소화하는 클록 트리 합성 툴입니다. 이 툴은 광범위한 클로킹 제품 데이터베이스에서 데이터를 가져와 시스템 수준의 다중 칩 클로킹 솔루션을 생성합니다.
설계 툴

PLLATINUMSIM-SW PLL loop filter, phase noise, lock time, and spur simulation tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

지원되는 제품 및 하드웨어

지원되는 제품 및 하드웨어

다운로드 옵션
패키지 CAD 기호, 풋프린트 및 3D 모델
HTQFP (PAP) 64 Ultra Librarian

주문 및 품질

포함된 정보:
  • RoHS
  • REACH
  • 디바이스 마킹
  • 납 마감/볼 재질
  • MSL 등급/피크 리플로우
  • MTBF/FIT 예측
  • 물질 성분
  • 인증 요약
  • 지속적인 신뢰성 모니터링
포함된 정보:
  • 팹 위치
  • 조립 위치

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