ADC121S101
- Specified Over a Range of Sample Rates
- 6-Pin WSON and SOT-23 Packages
- Variable Power Management
- Single Power Supply With 2.7 V to 5.25 V Range
- SPI™, QSPI\xE2™, MICROWIRE, and DSP
Compatible - AEC-Q100 Grade 1 Qualified
- DNL: +0.5 / –0.3 LSB (Typical)
- INL: ±0.40 LSB (Typical)
- Power Consumption:
- 3-V Supply: 2 mW (Typical)
- 5-V Supply: 10 mW (Typical)
The ADC121S101 is a low-power, single-channel CMOS 12-bit analog-to-digital converter with a high-speed serial interface. Unlike the conventional practice of specifying performance at a single sample rate only, the ADC121S101 is fully specified over a sample rate range of 500 ksps to 1 Msps. The converter is based upon a successive-approximation register architecture with an internal track-and-hold circuit.
The output serial data is straight binary, and is compatible with several standards, such as SPI™, QSPI™, MICROWIRE, and many common DSP serial interfaces.
The ADC121S101 operates with a single supply with a range from 2.7 V to 5.25 V. Normal power consumption using a 3 V or 5 V supply is 2 mW and 10 mW, respectively. The power-down feature reduces the power consumption to as low as 2.6 µW using a 5-V supply.
The ADC121S101 is packaged in 6-pin WSON and SOT-23 packages. Operation over the temperature range of 40°C to 125°C is specified.
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技術文件
類型 | 標題 | 日期 | ||
---|---|---|---|---|
* | Data sheet | ADC121S101x Single-Channel, 0.5 to 1-Msps, 12-Bit Analog-to-Digital Converter datasheet (Rev. H) | PDF | HTML | 2016年 4月 21日 |
E-book | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015年 5月 21日 | ||
EVM User's guide | ADC121S101EVM User's Guide | 2014年 6月 27日 | ||
EVM User's guide | 50 ksps to 1 Msps, 12-, 10- and 8-Bit EVM Users Manual | 2012年 2月 20日 | ||
User guide | WEBENCH® Sensor Designer Thermocouple Sensor Ver 1 PCB (unpopulated) User Guide | 2012年 1月 27日 | ||
Application note | Liquid-Level Monitoring Using a Pressure Sensor | 2008年 10月 15日 | ||
White paper | Amp Closed-Loop Bndwidth Considerations in High Res ADC Apps | 2006年 10月 1日 | ||
White paper | Optimizing Portable Applications with D/A Converters | 2006年 9月 1日 | ||
Application note | Maximizing Signal-Path Performance | 2005年 7月 8日 |
設計與開發
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ANALOG-ENGINEER-CALC — 類比工程師計算機
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
---|---|---|
SOT-23 (DBV) | 6 | Ultra Librarian |
WSON (NGF) | 6 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
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