產品詳細資料

Resolution (Bits) 32 Sample rate (max) (ksps) 4 Number of input channels 2 Interface type SPI Architecture Delta-Sigma Input type Differential Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 2.5 Input voltage range (min) (V) -2.5 Features GPIO, PGA Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 8 Analog supply voltage (min) (V) 3 Analog supply voltage (max) (V) 5.5 SNR (dB) 134 Digital supply (min) (V) 1.65 Digital supply (max) (V) 3.6
Resolution (Bits) 32 Sample rate (max) (ksps) 4 Number of input channels 2 Interface type SPI Architecture Delta-Sigma Input type Differential Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 2.5 Input voltage range (min) (V) -2.5 Features GPIO, PGA Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 8 Analog supply voltage (min) (V) 3 Analog supply voltage (max) (V) 5.5 SNR (dB) 134 Digital supply (min) (V) 1.65 Digital supply (max) (V) 3.6
VQFN (RHB) 32 25 mm² (5 mm × 5 mm)
  • Selectable resolution-power modes:
    • Dynamic range: 134dB at 2ms, 11.5mW
    • Dynamic range: 129dB at 2ms, 4.8mW
  • Flexible digital filter:
    • Selectable sinc + FIR + IIR
    • Linear or minimum phase
    • High-pass filter
  • THD: < –120dB
  • CMRR: 125dB
  • Data rates: 125 SPS to 4000 SPS
  • Programmable gains: 1 to 64
  • PGA bypass option
  • SYNC input
  • Clock error compensation
  • Two-channel multiplexer
  • Offset and gain calibration
  • General-purpose digital I/Os
  • Analog supply operation: 5V, 3.3V, or ±2.5V
  • Reference voltage options: 5V, 4.096V, or 2.5V
  • Selectable resolution-power modes:
    • Dynamic range: 134dB at 2ms, 11.5mW
    • Dynamic range: 129dB at 2ms, 4.8mW
  • Flexible digital filter:
    • Selectable sinc + FIR + IIR
    • Linear or minimum phase
    • High-pass filter
  • THD: < –120dB
  • CMRR: 125dB
  • Data rates: 125 SPS to 4000 SPS
  • Programmable gains: 1 to 64
  • PGA bypass option
  • SYNC input
  • Clock error compensation
  • Two-channel multiplexer
  • Offset and gain calibration
  • General-purpose digital I/Os
  • Analog supply operation: 5V, 3.3V, or ±2.5V
  • Reference voltage options: 5V, 4.096V, or 2.5V

The ADS1285 is a 32-bit, low-power, analog-to-digital converter (ADC), with a programmable gain amplifier (PGA) and a finite impulse response (FIR) filter. The ADC is designed for the demanding needs of seismology equipment requiring low-noise precision digitization and extended battery run time.

The low-noise PGA allows direct connection of geophones and transformer-coupled hydrophones without the need of an external amplifier.

The ADC incorporates a high-resolution, delta-sigma (ΔΣ) modulator and a FIR filter with programmable phase response. The high-pass filter removes dc and low-frequency content from the signal. Clock frequency error is compensated by the sample rate converter with 7ppb resolution.

Choice of power modes optimize dynamic range verses power consumption. Power consumption is further reduced by PGA bypass operation.

The ADC is available in a compact 5mm × 5mm VQFN package and is fully specified over the –40°C to +85°C ambient temperature range.

The ADS1285 is a 32-bit, low-power, analog-to-digital converter (ADC), with a programmable gain amplifier (PGA) and a finite impulse response (FIR) filter. The ADC is designed for the demanding needs of seismology equipment requiring low-noise precision digitization and extended battery run time.

The low-noise PGA allows direct connection of geophones and transformer-coupled hydrophones without the need of an external amplifier.

The ADC incorporates a high-resolution, delta-sigma (ΔΣ) modulator and a FIR filter with programmable phase response. The high-pass filter removes dc and low-frequency content from the signal. Clock frequency error is compensated by the sample rate converter with 7ppb resolution.

Choice of power modes optimize dynamic range verses power consumption. Power consumption is further reduced by PGA bypass operation.

The ADC is available in a compact 5mm × 5mm VQFN package and is fully specified over the –40°C to +85°C ambient temperature range.

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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 ADS1285 32-Bit, Delta-Sigma ADC for Seismic Applications datasheet (Rev. B) PDF | HTML 2025/11/12
應用說明 Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML 2023/3/29

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開發板

ADS1285EVM-PDK — 適用於 32 位元、高解析度、二通道 delta-sigma ADC 的 ADS1285 性能展示套件

ADS1285 評估模組 (EVM) 性能展示套件 (PDK) 是一款結合 ADS1285EVM-PDK 和精確主機介面 (PHI) 控制器板的平台。PHI 控制器板可讓 ADS1285EVM 透過 USB 埠連接電腦,並與設計用於完全評估 ADS1285 的軟體連接。

使用指南: PDF | HTML
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ADS1285-MSPM0-EXAMPLE-CODE — ADS1285 example C code

Expedite your embedded design using this example C code for the ADS1285
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模擬型號

ADS1285 IBIS Model

SBAM496.IBS (299 KB) - IBIS 模型
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計算工具

ADC-DESIGN-CALC — Online design calculator tool for TI Precision ADCs

ADC-DESIGN-CALC is an online resource with multiple ADC calculator tools (such as Digital Filter Response, Code-to-Voltage, CMR, CRC, etc.) for TI Precision ADCs.
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ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

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ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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VQFN (RHB) 32 Ultra Librarian

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