產品詳細資料

Resolution (Bits) 16 Sample rate (max) (ksps) 500 Number of input channels 8 Interface type SPI Architecture SAR Input type Pseudo-Differential, Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 4.2 Input voltage range (min) (V) 0 Features Daisy-Chainable Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 14.2 Analog supply voltage (min) (V) 2.7 Analog supply voltage (max) (V) 5.5 SNR (dB) 91.5 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
Resolution (Bits) 16 Sample rate (max) (ksps) 500 Number of input channels 8 Interface type SPI Architecture SAR Input type Pseudo-Differential, Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 4.2 Input voltage range (min) (V) 0 Features Daisy-Chainable Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 14.2 Analog supply voltage (min) (V) 2.7 Analog supply voltage (max) (V) 5.5 SNR (dB) 91.5 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
TSSOP (PW) 24 49.92 mm² 7.8 x 6.4 VQFN (RGE) 24 16 mm² 4 x 4
  • Low-Power, Flexible Supply Range:
    • 2.7-V to 5.5-V Analog Supply
    • 8.7 mW (250 kSPS in Auto-NAP Mode,
      VA = 2.7 V, VBD = 1.65 V)
    • 14.2 mW (500 kSPS, VA = 2.7 V,
      VBD = 1.65 V)
  • Up to 500-kSPS Sampling Rate
  • Excellent DC Performance:
    • ±1.2 LSB Typical, ±2 LSB Maximum INL at
      2.7 V
    • ±0.6 LSB Typical, –1/1.5 LSB Maximum DNL
      at 2.7 V
    • 16-Bit NMC Over Temperature
  • Excellent AC Performance at 5 V, fIN = 1 kHz:
    • 91.5-dB SNR, 101-dB SFDR, –100-dB THD
  • Flexible Analog Input Arrangement:
    • On-Chip 4-/8-Channel Mux With Breakout
    • Auto/Manual Channel Select and Trigger
  • Other Hardware Features:
    • On-Chip Conversion Clock (CCLK)
    • Software/Hardware Reset
    • Programmable Status/Polarity EOC/INT
    • Daisy-Chain Mode
    • Global CONVST (Independent of CS)
    • Deep, Nap, and Auto-NAP Powerdown Modes
    • SPI™/DSP Compatible Serial Interface
    • Separate I/O Supply: 1.65 V to VA
    • SCLK up to 40 MHz (VA = VBD = 5 V)
  • 24-Pin 4-mm × 4-mm VQFN and 24-Pin TSSOP
    Packages
  • Low-Power, Flexible Supply Range:
    • 2.7-V to 5.5-V Analog Supply
    • 8.7 mW (250 kSPS in Auto-NAP Mode,
      VA = 2.7 V, VBD = 1.65 V)
    • 14.2 mW (500 kSPS, VA = 2.7 V,
      VBD = 1.65 V)
  • Up to 500-kSPS Sampling Rate
  • Excellent DC Performance:
    • ±1.2 LSB Typical, ±2 LSB Maximum INL at
      2.7 V
    • ±0.6 LSB Typical, –1/1.5 LSB Maximum DNL
      at 2.7 V
    • 16-Bit NMC Over Temperature
  • Excellent AC Performance at 5 V, fIN = 1 kHz:
    • 91.5-dB SNR, 101-dB SFDR, –100-dB THD
  • Flexible Analog Input Arrangement:
    • On-Chip 4-/8-Channel Mux With Breakout
    • Auto/Manual Channel Select and Trigger
  • Other Hardware Features:
    • On-Chip Conversion Clock (CCLK)
    • Software/Hardware Reset
    • Programmable Status/Polarity EOC/INT
    • Daisy-Chain Mode
    • Global CONVST (Independent of CS)
    • Deep, Nap, and Auto-NAP Powerdown Modes
    • SPI™/DSP Compatible Serial Interface
    • Separate I/O Supply: 1.65 V to VA
    • SCLK up to 40 MHz (VA = VBD = 5 V)
  • 24-Pin 4-mm × 4-mm VQFN and 24-Pin TSSOP
    Packages

The ADS8331 is a low-power, 16-bit, 500-k samples-per-second (SPS) analog-to-digital converter (ADC) with a unipolar, 4-to-1 multiplexer (mux) input. The device includes a 16-bit capacitor-based successive approximation register (SAR) ADC with inherent sample and hold.

The ADS8332 is based on the same core and includes a unipolar 8-to-1 input mux. Both devices offer a high-speed, wide-voltage serial interface and are capable of daisy-chain operation when multiple converters are used.

These converters are available in 24-pin, 4 × 4 QFN and 24-pin TSSOP packages and are fully specified for operation over the industrial –40°C to 85°C temperature range.

The ADS8331 is a low-power, 16-bit, 500-k samples-per-second (SPS) analog-to-digital converter (ADC) with a unipolar, 4-to-1 multiplexer (mux) input. The device includes a 16-bit capacitor-based successive approximation register (SAR) ADC with inherent sample and hold.

The ADS8332 is based on the same core and includes a unipolar 8-to-1 input mux. Both devices offer a high-speed, wide-voltage serial interface and are capable of daisy-chain operation when multiple converters are used.

These converters are available in 24-pin, 4 × 4 QFN and 24-pin TSSOP packages and are fully specified for operation over the industrial –40°C to 85°C temperature range.

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技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet ADS833x Low-Power, 16-Bit, 500-kSPS, 4- and 8-Channel Unipolar Input Analog-to-Digital Converters With Serial Interface datasheet (Rev. E) PDF | HTML 2016年 8月 9日
White paper Voltage-reference impact on total harmonic distortion 2016年 8月 1日
E-book Best of Baker's Best: Precision Data Converters -- SAR ADCs 2015年 5月 21日
Application note Interfacing the ADS8332 to the TMS320F28335 DSP 2012年 8月 20日
User guide ADS833xEVM User's Guide (Rev. A) 2011年 5月 11日
Application note Determining Minimum Acquisition Times for SAR ADCs, part 2 2011年 3月 17日
Application note Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) 2010年 11月 10日

設計與開發

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開發板

ADS8332EVMV2-PDK — ADS8332 16 位元 500 kSPS 低功耗串聯 ADC 評估模組性能展示套件 (PDK)

ADS8332 評估模組 (EVM) 性能示範套件 (PDK) 是用於評估 ADS8332 漸近法暫存器 (SAR) 類比轉數位轉換器 (ADC) 性能的平台。ADS8332EVMV2-PDK 內含 ADS8332EVMV2 板、精密主機介面 (PHI) 控制器電路板,以及隨附的電腦軟體,可讓使用者透過通用序列匯流排 (USB) 與 ADC 通訊、擷取資料,以及執行資料分析。

使用指南: PDF | HTML
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開發模組 (EVM) 的 GUI

SBAC169 ADS8332 EVM GUI Installer

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模擬型號

ADS8331, ADS8332 IBIS Model

SBAM020.ZIP (79 KB) - IBIS Model
模擬型號

ADS8332 TINA-TI Spice Model

SBAM182.ZIP (57 KB) - TINA-TI Spice Model
模擬型號

ADS8332 TINA-TI Transient Reference Design

SBAM183.TSC (4266 KB) - TINA-TI Reference Design
計算工具

ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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計算工具

JITTER-SNR-CALC Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一,涵蓋我們的類比和電源產品組合,以及特定類比行為模型,且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前,建立完整的終端設備設計和解決方案原型,進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中,您可以搜尋 TI (...)
模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
TSSOP (PW) 24 Ultra Librarian
VQFN (RGE) 24 Ultra Librarian

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  • 鉛塗層/球物料
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  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中的可靠性監測
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  • 晶圓廠位置
  • 組裝地點

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