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類比轉數位轉換器 (ADC)
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ADS9110

現行

具有強化型序列周邊介面 (SPI) 的 18 位元、2-MSPS、單通道 SAR ADC

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產品規格表

ADS9110

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 18 Sample rate (max) (ksps) 2000 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 15 Analog supply voltage (min) (V) 1.65 Analog supply voltage (max) (V) 1.95 SNR (dB) 100 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
Resolution (Bits) 18 Sample rate (max) (ksps) 2000 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 15 Analog supply voltage (min) (V) 1.65 Analog supply voltage (max) (V) 1.95 SNR (dB) 100 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
VQFN (RGE) 24 16 mm² (4 mm × 4 mm)
  • Sample Rate: 2MSPS
  • No Latency Output
  • Excellent DC and AC Performance:
    • INL: ±0.5LSB
    • DNL: ±0.75LSB
    • SNR: 100dB, THD: –118dB
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5V to 5V, Independent of AVDD
  • Low-Power Dissipation:
    • 9mW at 2MSPS (AVDD Only)
    • 15mW at 2MSPS (Total)
    • Flexible Low-Power Modes Enable Power Scaling with Throughput
  • Enhanced-SPI ( multiSPI™) Digital Interface
  • JESD8-7A-Compliant Digital I/O at 1.8V DVDD
  • Fully-Specified Over Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4mm × 4mm VQFN
  • Sample Rate: 2MSPS
  • No Latency Output
  • Excellent DC and AC Performance:
    • INL: ±0.5LSB
    • DNL: ±0.75LSB
    • SNR: 100dB, THD: –118dB
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5V to 5V, Independent of AVDD
  • Low-Power Dissipation:
    • 9mW at 2MSPS (AVDD Only)
    • 15mW at 2MSPS (Total)
    • Flexible Low-Power Modes Enable Power Scaling with Throughput
  • Enhanced-SPI ( multiSPI™) Digital Interface
  • JESD8-7A-Compliant Digital I/O at 1.8V DVDD
  • Fully-Specified Over Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4mm × 4mm VQFN

The ADS9110 is an 18-bit, 2MSPS, successive approximation register (SAR) analog-to-digital converter (ADC) with enhanced performance features. The high throughput enables developers to oversample the input signal to improve dynamic range and accuracy of the measurement. The ADS9120 is a pin-compatible, 16-bit, 2.5MSPS variant of the ADS9110.

The ADS9110 boosts analog performance while maintaining high-resolution data transfer by using TI’s enhanced SPI feature. Enhanced SPI enables the ADS9110 to achieve high throughput at lower clock speeds, thereby simplifying board layout and lowering system cost.

Enhanced SPI also simplifies the host clocking-in of data, thereby making the device ideal for applications involving FPGAs and DSPs. The ADS9110 is compatible with a standard SPI Interface. The ADS9110 has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The device supports JESD8-7A compliant I/Os, the extended industrial temperature range, and is offered in a space-saving, 4mm × 4mm, VQFN package.

The ADS9110 is an 18-bit, 2MSPS, successive approximation register (SAR) analog-to-digital converter (ADC) with enhanced performance features. The high throughput enables developers to oversample the input signal to improve dynamic range and accuracy of the measurement. The ADS9120 is a pin-compatible, 16-bit, 2.5MSPS variant of the ADS9110.

The ADS9110 boosts analog performance while maintaining high-resolution data transfer by using TI’s enhanced SPI feature. Enhanced SPI enables the ADS9110 to achieve high throughput at lower clock speeds, thereby simplifying board layout and lowering system cost.

Enhanced SPI also simplifies the host clocking-in of data, thereby making the device ideal for applications involving FPGAs and DSPs. The ADS9110 is compatible with a standard SPI Interface. The ADS9110 has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The device supports JESD8-7A compliant I/Os, the extended industrial temperature range, and is offered in a space-saving, 4mm × 4mm, VQFN package.
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重要文件 類型 標題 格式選項 下載最新的英文版本 日期
* 資料表 ADS9110 18-Bit, 2MSPS, 15mW, SAR ADC With Enhanced Performance Features datasheet (Rev. C) PDF | HTML 2026/4/6
Product overview Precision ADCs for In-Vitro Diagnostics PDF | HTML 2024/9/4
Application brief Understanding and Using SAR ADC SPICE Micromodel PDF | HTML 2021/11/23
Application brief Maximizing System Total Harmonic Distortion Using High Speed Amplifiers 2018/6/20
應用說明 Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs 2018/6/14
Application brief Improving Input Settling for Precision Data Converters 2017/12/12
Application brief Optimizing Data Transfer on High-Resolution, High-Throughput Data Converters 2017/12/12
Application brief Simplify Isolation Designs Using an Enhanced-SPI ADC Interface 2017/12/11
應用說明 Improving Resolution of SAR ADC 2017/6/14
白皮書 Enabling Faster, Smarter, and More Robust Solutions for SAR ADSx With multiSPI 2016/11/8
白皮書 Voltage-reference impact on total harmonic distortion 2016/8/1

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

ADS9110EVM-PDK — ADS9110 18 位元 2 MSPS、15mW SAR ADC EVM 性能展示套件 (PDK)

ADS9110 評估模組 (EVM) 性能展示套件 (PDK) 是用於評估 ADS9110 連續近似暫存器類比轉數位轉換器 (SAR ADC) 效能的平台。ADS9110EVM-PDK 包含 ADS9110 EVM 板、PHI 控制器電路板，以及隨附的電腦軟體，可讓使用者透過通用序列匯流排 (USB) 與 ADC 通訊、擷取資料，以及執行資料分析。

使用指南: PDF | HTML
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支援軟體

SBAC140 — ADS9110EVM-PDK Software

ADS9110EVM-PDK Software
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支援軟體

SBAC193 — Source Files for SBAA265

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模擬型號

ADS9110 IBIS MODEL

SLAM274.ZIP (12 KB) - IBIS 模型
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模擬型號

ADS9110 PSpice Model (Rev. B)

SBAM461B.ZIP (3290 KB) - PSpice 模型
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模擬型號

ADS9110 TINA-TI Spice Model

SBAM254.ZIP (26 KB) - TINA-TI Spice 模型
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模擬型號

ADS9110 TINA-TI Transient Reference Design

SBAM253.TSC (285 KB) - TINA-TI 參考設計
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模擬型號

ADS9110 TINA-TI Transient Reference Simulation

SBAM255.TSC (297 KB) - TINA-TI 參考設計
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面，列出各種常見計算，從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。

除了作為獨立工具使用外，此計算機還與類比工程師口袋參考中描述的概念相得益彰。

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設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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參考設計

TIDA-00732 — 可實現最大 SNR 和採樣率的 18 位元 2 MSPS 隔離式資料採集參考設計

本「可實現最大 SNR 和取樣率的 18 位元、2Msps 隔離式資料採集參考設計」說明如何克服隔離式資料擷取系統設計中典型的性能限制挑戰：

  • 透過將數位隔離器帶來的傳播延遲降到最低，將取樣率最大化
  • 透過有效緩解數位隔離器所帶來的 ADC 取樣時脈抖動，將高頻率 AC 訊號鏈性能 (SNR) 最大化
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參考設計

TIDA-01055 — 適用於高效能 DAQ 系統的 ADC 電壓參考緩衝器最佳化參考設計

高效能 DAQ 系統的 TIDA-01055 參考設計可將 ADC 參考緩衝器最佳化，以 TI OPA837 高速運算放大器提升 SNR 性能並減少功耗。此裝置用於複合緩衝器配置，相較於傳統運算放大器，可提供 22% 的電源改善。具備整合式緩衝器的電壓參考來源通常缺乏在高通道數系統中實現最佳化性能所需的驅動強度。  此參考設計可驅動多個 ADC，並使用 18 位元、2MSPS SAR ADC 實現 15.77 位元的系統 ENOB。
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參考設計

TIPD115 — 採用最低失真、最低雜訊最佳化設定的 18 位元、1 MSPS 資料採集參考設計

This verified design is a high performance data acquisition system (DAQ) using an 18-bit SAR ADC, ADS8881 at a throughput of 1MSPS. This design has been optimized to provide the lowest noise & distortion solution for a full scale input sinewave of 10 KHz. This leads to a maximum possible value (...)

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VQFN (RGE) 24 Ultra Librarian
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