ADS8505
- 105dB SFDR at 250-kHz Sample Rate
- Standard ±10-V Input Range
- ±1.5 LSB Max INL
- ±1 LSB Max DNL, 16-Bits No Missing Codes
- ±2 mV Max Bipolar Zero Error With ±0.4 PPM/°C Drift
- ±0.1% FSR Max Full-Scale Error With ±2 PPM/°C Drift
- Single 5-V Supply Operation
- Pin-Compatible With ADS7805 (Low Speed) and 12-Bit ADS8504/7804
- Uses Internal or External Reference
- Full Parallel Data Output
- 70-mW Typ Power Dissipation at 250 KSPS
- 28-Pin SSOP and SOIC Packages
- APPLICATIONS
- Industrial Process Control
- Data Acquisition Systems
- Digital Signal Processing
- Medical Equipment
- Instrumentation
The ADS8505 is a complete 16-bit sampling A/D converter using state-of-the-art CMOS structures. It contains a complete 16-bit, capacitor-based, SAR A/D with S/H, reference, clock, interface for microprocessor use, and 3-state output drivers.
The ADS8505 is specified at a 250-kHz sampling rate over the full temperature range. Precision resistors provide an industry standard ±10-V input range, while the innovative design allows operation from a single +5-V supply, with power dissipation under 100 mW.
The ADS8505 is available in 28-pin SOIC and 28-pin SSOP packages, both fully specified for operation over the industrial -40°C to 85°C temperature range.
技術文件
| 重要文件 | 類型 | 標題 | 格式選項 | 下載最新的英文版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 資料表 | 16-Bit 250-KSPS Sampling CMOS Analog-to-Digital Converter datasheet (Rev. B) | 2007/2/1 | |||
| 白皮書 | Voltage-reference impact on total harmonic distortion | 2016/8/1 | ||||
| 電子書 | Best of Baker's Best: Precision Data Converters -- SAR ADCs | 2015/5/21 | ||||
| 應用說明 | Determining Minimum Acquisition Times for SAR ADCs, part 2 | 2011/3/17 | ||||
| 應用說明 | Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) | 2010/11/10 | ||||
| 應用說明 | Upgrading from the ADS7804/05 to the ADS8504/05 | 2007/4/30 | ||||
| 應用說明 | Controlling the ADS7805 With TMS320 Series DSPs | 2004/11/9 |
設計與開發
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ADS8505EVM — ADS8505 評估模組
The ADS8505EVM is designed for the prototyping and evaluation of the ADS8505 analog-to-digital converter (ADC). This 16-bit, capacitor-based, SAR/ADC operates at a maximum rate of 250 KSPS. The EVM allows the use of an optional buffer amplifier U8 to condition the input signals to the ADS8505 (...)
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
類比工程師的計算機旨在加速類比電路設計工程師定期使用的許多重複計算。此基於 PC 的工具提供圖形介面,列出各種常見計算,從使用回饋電阻器設定運算放大器增益到選擇適當的電路設計元件以穩定類比數位轉換器 (ADC) 驅動緩衝電路。
除了作為獨立工具使用外,此計算機還與類比工程師口袋參考中描述的概念相得益彰。
JITTER-SNR-CALC — Jitter and SNR calculator
JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SSOP (DB) | 28 | Ultra Librarian |
| SOIC (DW) | 28 | Ultra Librarian |
訂購與品質
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。