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類比轉數位轉換器 (ADC)
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ADS8319

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具 SPI 介面的精密度 16 位元 SAR 類比轉數位轉換器 (ADC)

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產品規格表

ADS8319

現行
產品規格表 立即訂購

產品詳細資料

Resolution (Bits) 16 Sample rate (max) (ksps) 500 Number of input channels 1 Interface type SPI Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Small Size Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 18 Analog supply voltage (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 SNR (dB) 93.9 Digital supply (min) (V) 2.375 Digital supply (max) (V) 5.5
Resolution (Bits) 16 Sample rate (max) (ksps) 500 Number of input channels 1 Interface type SPI Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Small Size Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 18 Analog supply voltage (min) (V) 4.5 Analog supply voltage (max) (V) 5.5 SNR (dB) 93.9 Digital supply (min) (V) 2.375 Digital supply (max) (V) 5.5
VSON (DRC) 10 9 mm² 3 x 3 VSSOP (DGS) 10 14.7 mm² 3 x 4.9
  • 500-kHz Sample Rate
  • 16-Bit Resolution
  • Zero Latency at Full Speed
  • Unipolar, Single-Ended Input Range: 0 V to VREF
  • SPI-Compatible Serial Interface With Daisy-Chain Option
  • Excellent Performance:
    • 93.6-dB SNR (Typical) at 10-kHz Input
    • –106-dB THD (Typical) at 10-kHz Input
    • ±1.5-LSB (Maximum) INL
    • ±1-LSB (Maximum) DNL
  • Low Power Dissipation: 18 mW (Typical) at 500 kSPS
  • Power Scales Linearly with Speed: 3.6 mW / 100 kSPS
  • Power Dissipation During Power-Down State: 0.25 µW (Typical)
  • 10-Pin VSSOP and VSON Packages
  • 500-kHz Sample Rate
  • 16-Bit Resolution
  • Zero Latency at Full Speed
  • Unipolar, Single-Ended Input Range: 0 V to VREF
  • SPI-Compatible Serial Interface With Daisy-Chain Option
  • Excellent Performance:
    • 93.6-dB SNR (Typical) at 10-kHz Input
    • –106-dB THD (Typical) at 10-kHz Input
    • ±1.5-LSB (Maximum) INL
    • ±1-LSB (Maximum) DNL
  • Low Power Dissipation: 18 mW (Typical) at 500 kSPS
  • Power Scales Linearly with Speed: 3.6 mW / 100 kSPS
  • Power Dissipation During Power-Down State: 0.25 µW (Typical)
  • 10-Pin VSSOP and VSON Packages

The ADS8319 device is a 16-bit, 500-kSPS, analog-to-digital converter (ADC) that operates with a 2.25-V to 5.5-V external reference. The device includes a capacitor-based, successive-approximation register (SAR) ADC with inherent sample and hold.

The device includes a 50-MHz, SPI-compatible serial interface. The interface is designed to support daisy-chaining or cascading of multiple devices. Furthermore, a Busy Indicator makes synchronizing with the digital host easy.

The device unipolar, single-ended input range supports an input swing of 0 V to +VREF.

Device operation is optimized for very-low power operation and the power consumption directly scales with speed. This feature makes the device attractive for lower-speed applications. The device is available in 10-pin VSSOP and VSON packages.

The ADS8319 device is a 16-bit, 500-kSPS, analog-to-digital converter (ADC) that operates with a 2.25-V to 5.5-V external reference. The device includes a capacitor-based, successive-approximation register (SAR) ADC with inherent sample and hold.

The device includes a 50-MHz, SPI-compatible serial interface. The interface is designed to support daisy-chaining or cascading of multiple devices. Furthermore, a Busy Indicator makes synchronizing with the digital host easy.

The device unipolar, single-ended input range supports an input swing of 0 V to +VREF.

Device operation is optimized for very-low power operation and the power consumption directly scales with speed. This feature makes the device attractive for lower-speed applications. The device is available in 10-pin VSSOP and VSON packages.
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技術文件

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重要文件 類型 標題 格式選項 日期
* Data sheet ADS8319 16-Bit, 500-kSPS, Serial Interface, Micropower, Miniature, SAR Analog-to-Digital Converter datasheet (Rev. C) PDF | HTML 2016年 12月 9日
Circuit design Antialiasing filter circuit design for single-ended ADC input using fixed cutoff (Rev. B) PDF | HTML 2024年 9月 24日
Circuit design Circuit for protecting low-voltage SAR ADC from electrical overstress with minim (Rev. A) PDF | HTML 2024年 9月 19日
White paper Voltage-reference impact on total harmonic distortion 2016年 8月 1日
More literature SAR ADCs for PLC Applications 2016年 2月 11日
E-book Best of Baker's Best: Precision Data Converters -- SAR ADCs 2015年 5月 21日
Application note Determining Minimum Acquisition Times for SAR ADCs, part 2 2011年 3月 17日
Analog Design Journal The IBIS model, Part 2: Determining the total quality of an IBIS model 2011年 3月 14日
Application note Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A) 2010年 11月 10日
Application note Low Power Input and Reference Driver Circuit for ADS8318 and ADS8319 2009年 6月 24日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

支援軟體

SBAC197 — Source Files for SBAA282

支援產品和硬體

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模擬型號

ADS8319 IBIS Model

SBAM087.ZIP (28 KB) - IBIS Model
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模擬型號

ADS8319 TINA-TI Spice Model

SLAM206.ZIP (50 KB) - TINA-TI Spice Model
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模擬型號

ADS8319 TINA-TI Transient Reference Design

SLAM207.TSC (2625 KB) - TINA-TI Reference Design
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計算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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計算工具

JITTER-SNR-CALC — Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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設計工具

ADC-DAC-TO-VREF-SELECT-DESIGN-TOOL — The ADC-TO-VREF-SELECT tool enables the pairing of TI ADCs, DACs, and series voltage references.

The ADC-TO-VREF-SELECT tool enables the pairing of TI analog-to-digital converters (ADCs) and series voltage references. Users can select an ADC device and the desired reference voltage, and the tool will list up to two voltage reference recommendations.
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI 是有助於評估類比電路功能的設計和模擬環境。這款全功能設計和模擬套件使用 Cadence® 的類比分析引擎。PSpice for TI 包括業界最大的模型庫之一，涵蓋我們的類比和電源產品組合，以及特定類比行為模型，且使用無需支付費用。

PSpice for TI 設計和模擬環境可讓您使用其內建函式庫來模擬複雜的混合訊號設計。在進行佈局和製造之前，建立完整的終端設備設計和解決方案原型，進而縮短上市時間並降低開發成本。 

在 PSpice for TI 設計與模擬工具中，您可以搜尋 TI (...)
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模擬工具

TINA-TI — 基於 SPICE 的類比模擬程式

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
View Options
封裝 針腳 CAD 符號、佔位空間與 3D 模型
VSON (DRC) 10 Ultra Librarian
VSSOP (DGS) 10 Ultra Librarian
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