Product details

Frequency (max) (MHz) 15100 Frequency (min) (MHz) 39.3 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Enhanced Product, Integrated VCO, JESD204B SYSREF, Multi-device sync, Phase adjustment, Programmable output power, Wideband Current consumption (mA) 360 Integrated VCO Yes Operating temperature range (°C) -55 to 125 Rating HiRel Enhanced Product Lock time (µs) (typ) (s) Loop BW dependent
Frequency (max) (MHz) 15100 Frequency (min) (MHz) 39.3 Normalized PLL phase noise (dBc/Hz) -236 1/f noise (10-kHz offset at 1-GHz carrier) (dBc/Hz) -129 Features Enhanced Product, Integrated VCO, JESD204B SYSREF, Multi-device sync, Phase adjustment, Programmable output power, Wideband Current consumption (mA) 360 Integrated VCO Yes Operating temperature range (°C) -55 to 125 Rating HiRel Enhanced Product Lock time (µs) (typ) (s) Loop BW dependent
VQFNP (RTC) 48 49 mm² 7 x 7
  • VID V62/19616 -01XE
  • 39.3-MHz to 15.1-GHz output frequency
  • –110 dBc/Hz phase noise at 100-kHz offset with 15-GHz carrier
  • 54-fs RMS jitter at 8 GHz (100 Hz to 100 MHz)
  • Programmable output power
  • PLL key specifications
    • Figure of merit: –236 dBc/Hz
    • Normalized 1/f noise: –129 dBc/Hz
    • Up to 200-MHz phase detector frequency
  • Synchronization of output phase across multiple devices
  • Support for SYSREF with 9-ps resolution programmable delay
  • 3.3-V single power supply operation
  • Operating temperature range: –55°C to 125°C
  • VID V62/19616 -01XE
  • 39.3-MHz to 15.1-GHz output frequency
  • –110 dBc/Hz phase noise at 100-kHz offset with 15-GHz carrier
  • 54-fs RMS jitter at 8 GHz (100 Hz to 100 MHz)
  • Programmable output power
  • PLL key specifications
    • Figure of merit: –236 dBc/Hz
    • Normalized 1/f noise: –129 dBc/Hz
    • Up to 200-MHz phase detector frequency
  • Synchronization of output phase across multiple devices
  • Support for SYSREF with 9-ps resolution programmable delay
  • 3.3-V single power supply operation
  • Operating temperature range: –55°C to 125°C

The LMX2694-EP device is a high-performance, wideband phase-locked loop (PLL) with an integrated voltage-controlled oscillator (VCO) and voltage regulators that can output any frequency between 39.3 MHz and 15.1 GHz without a doubler, eliminating the need for ½ harmonic filters. The VCO on this device covers an entire octave to complete the frequency coverage down to 39.3 MHz. The high-performance PLL, with a –236-dBc/Hz figure of merit and high-phase detector frequency, can achieve very low in-band noise and integrated jitter.

The LMX2694-EP allows designers to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in any use case, including one with the fractional engine or output divider enabled. The device also allows designers to generate or repeat SYSREF (compliant to JESD204B standard) to use the device as a low-noise clock source for high-speed data converters.

The LMX2694-EP device is a high-performance, wideband phase-locked loop (PLL) with an integrated voltage-controlled oscillator (VCO) and voltage regulators that can output any frequency between 39.3 MHz and 15.1 GHz without a doubler, eliminating the need for ½ harmonic filters. The VCO on this device covers an entire octave to complete the frequency coverage down to 39.3 MHz. The high-performance PLL, with a –236-dBc/Hz figure of merit and high-phase detector frequency, can achieve very low in-band noise and integrated jitter.

The LMX2694-EP allows designers to synchronize the output of multiple instances of the device. This means that deterministic phase can be obtained from a device in any use case, including one with the fractional engine or output divider enabled. The device also allows designers to generate or repeat SYSREF (compliant to JESD204B standard) to use the device as a low-noise clock source for high-speed data converters.

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Technical documentation

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* Data sheet LMX2694-EP 15-GHz Wideband PLLatinum RF Synthesizer With Phase Synchronization datasheet (Rev. D) PDF | HTML 01 Mar 2022
* Radiation & reliability report LMX2694-EP Reliability Report (Rev. A) PDF | HTML 03 Apr 2024
Application note Practical Clocking Considerations That Give Your Next High-Speed Converter Design an Edge (Rev. A) PDF | HTML 11 Apr 2025
Application brief Compilation of RF Synthesizer Resources PDF | HTML 22 Oct 2024
Certificate LMX2694EPEVM EU Declaration of Conformity (DoC) 12 May 2023

Design & development

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Evaluation board

LMX2694EPEVM — 15-GHz wideband RF synthesizer evaluation module

This evaluation module is for the LMX2694-EP, which is an extended temperature, 15-GHz wideband RF synthesizser. This synthesizer supports JESD204B compliant SYSREF signal buffering and generation. The LMX2694-EP allows designers to synchronize the output of multiple instances of the device.
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CLOCK-TREE-ARCHITECT — Clock tree architect programming software

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
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PLLATINUMSIM-SW PLL loop filter, phase noise, lock time, and spur simulation tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

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