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CDCLVC1102

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Low jitter, 1:2 LVCMOS fan-out clock buffer

Data sheet
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Low jitter, 1:2 LVCMOS fan-out clock buffer

CDCLVC1102

ACTIVE
Data sheet Order now

Product details

Parameters

Function Single-ended Additive RMS jitter (Typ) (fs) 70 Output frequency (Max) (MHz) 250 Number of outputs 2 Output supply voltage (V) 2.5, 3.3 Core supply voltage (V) 2.5, 3.3 Output skew (ps) 50 Features 1:2 fanout, Output enable control Operating temperature range (C) -40 to 85 Rating Catalog Output type LVCMOS Input type LVCMOS open-in-new Find other Clock buffers

Package | Pins | Size

TSSOP (PW) 8 19 mm² 3 x 6.4 open-in-new Find other Clock buffers

Features

  • High-Performance 1:2, 1:3, 1:4, 1:6, 1:8, 1:10, 1:12 LVCMOS Clock Buffer Family
  • Very Low Pin-to-Pin Skew < 50 ps
  • Very Low Additive Jitter < 100 fs
  • Supply Voltage: 3.3 V or 2.5 V
  • fmax = 250 MHz for 3.3 V
    fmax = 180 MHz for 2.5 V
  • Operating Temperature Range: –40°C to 85°C
  • Available in 8-, 14-, 16-, 20-, 24-Pin TSSOP Package (All Pin-Compatible)
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Description

The CDCLVC11xx is a modular, high-performance, low-skew, general-purpose clock buffer family from Texas Instruments.

The entire family is designed with a modular approach in mind. It is intended to round up TI’s series of LVCMOS clock generators.

Seven different fan-out variations, 1:2 to 1:12, are available. All of the devices are pin-compatible to each other for easy handling.

All family members share the same high performing characteristics such as low additive jitter, low skew, and wide operating temperature range.

The CDCLVC11xx supports an asynchronous output enable control (1G) which switches the outputs into a low state when 1G is low.

The CDCLVC11xx family operates in a 2.5-V and
3.3-V environment and are characterized for operation from –40°C to 85°C.

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LMK1C1102 ACTIVE 2-channel output LVCMOS 1.8-V buffer LMK1C1102 is parametrically superior to the CDCLVC1102, more cost-effective than the CDCLVC1102, and has added features, such as synchronous output enable.

Technical documentation

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Type Title Date
* Data sheet CDCLVC11xx 3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer Family datasheet (Rev. B) Feb. 24, 2017
Application note How to Apply 1.8-V Signals to 3.3-V CDCLVC11xx Fanout Clock Buffer Nov. 30, 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARD Download
document-generic User guide
149
Description
The CDCLVC1104 is a high-performance, low-additive phase noise LVCMOS clock buffer. It has one LVCMOS input and four LVCMOS outputs. It also has an enable pin. This evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVC1104. However, this EVM can also be used for (...)
Features
  • Easy-to-use evaluation board to fan out low-phase noise LVCMOS clock signals
  • Easy device setup
  • Enable pin configurable through jumper and SMA
  • Board powered at 2.5 V or 3.3 V
View details
EVALUATION BOARD Download
document-generic User guide
Description
DLP® LightCrafter Display 4710 EVM-G2 is an easy to use, plug and play evaluation platform for the Full HD DLP4710 chipset. The DLP4710 chipset is designed to be used in a wide array of display applications like mobile projectors, screenless TVs, interactive displays and digital signage. The DLP4710 (...)
Features
  • 1080p HD display using DLP4710
  • Digital controller for the DLP4710 DMD, DLPC3439
  • PMIC/LED driver for the DLP4710 DMD and DLPC3439 controller, DLPA3005
  • Production ready RGB LED optical engine from YoungOptics
  • DLP4710, DLPC3439 Configuration and Support Firmware
View details

Design tools & simulation

SIMULATION MODEL Download
SLLM088B.ZIP (263 KB) - IBIS Model
SIMULATION TOOL Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)
View details
DESIGN TOOL Download
Clock tree architect programming software
CLOCK-TREE-ARCHITECT — Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
Features
  • Accepts customer specific design requirements such as input frequencies, output frequencies, clock formats and clock counts
  • Generates clock trees by taking into account a variety of advanced specifications, such as noise floor and phase determinism requirements
  • Presents clear and intuitive block (...)
View details

Reference designs

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TIDA-00928 — This ethernet brick reference design provides a simplified solution that eliminates the need to have multiple boards for copper or fiber interface. It uses a small form factor, low power 10/100 Mbps ethernet transceiver to reduce board size for a cost optimized and scalable solution with reduced (...)
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REFERENCE DESIGNS Download
Compact Full HD 1080p (up to 16 Amps) Projection Display Reference Design Using DLP Pico Technology
TIDA-01226 — This reference design, featuring the DLP Pico™ 0.47-inch TRP Full-HD 1080p display chipset and implemented in the DLP LightCrafter Display 4710 G2 evaluation module (EVM), enables use of full HD resolution for projection display applications such as accessory projectors, screenless displays (...)
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REFERENCE DESIGNS Download
High Accuracy ±0.5% Current and Isolated Voltage Measurement Ref Design Using 24-Bit Delta-Sigma ADC
TIDA-00835 — The TIDA-00835 reference design allows for accurate voltage and current measurement using a bipolar input configuration by incorporating a four- channel, 24-bit simultaneously-sampling differential input Delta-Sigma ADC over wide dynamic range. The ADC is configured to measure ±2.5 V bipolar (...)
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Reference Design to Measure AC Voltage & Current in Protection Relays w/Delta-Sigma Chip Diagnostics
TIDA-00810 — The TIDA-00810 reference design accurately measures analog inputs performance and includes chip diagnostics to help identify power  systems failures early by using a highly accuracy AC voltage and current measurement analog front end (AFE) and a four-channel, 24-bit simultaneously-sampling (...)
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REFERENCE DESIGNS Download
EN55011 Compliant, Industrial Temperature, 10/100Mbps Ethernet PHY Brick Reference Design
TIDA-00207 — This Ethernet PHY Brick reference design enables Texas Instruments customers to quickly design systems and release them to market, using TI industrial Ethernet PHY transceiver devices, fully compliant to EN5501 Class A EMI requirements. A 50 Pin Interface has been provided to interface with 32-Bit (...)
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
TSSOP (PW) 8 View options

Ordering & quality

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