Produktdetails

Resolution (Bits) 16 Sample rate (max) (ksps) 250 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 14 Analog supply voltage (min) (V) 3 Analog supply voltage (max) (V) 5.5 SNR (dB) 96.8 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
Resolution (Bits) 16 Sample rate (max) (ksps) 250 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 14 Analog supply voltage (min) (V) 3 Analog supply voltage (max) (V) 5.5 SNR (dB) 96.8 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
VQFN (RGE) 24 16 mm² 4 x 4
  • Resolution: 16-Bits
  • High Sample Rate With No Latency Output:
    • ADS8920B: 1-MSPS
    • ADS8922B: 500-kSPS
    • ADS8924B: 250-kSPS
  • Integrated LDO Enables Single-Supply Operation
  • Low Power Reference Buffer with No Droop
  • Excellent AC and DC Performance:
    • SNR: 96.8-dB, THD: –125-dB
    • INL: ±0.25-LSB
    • DNL: ±0.2-LSB, 16-Bit No-Missing-Codes
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5-V to 5-V
  • Single-Supply, Low-Power Operation
  • Enhanced-SPI Digital Interface
    • Interface SCLK: 18-MHz at 1-MSPS
    • Configurable Data Parity Output
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN
  • Resolution: 16-Bits
  • High Sample Rate With No Latency Output:
    • ADS8920B: 1-MSPS
    • ADS8922B: 500-kSPS
    • ADS8924B: 250-kSPS
  • Integrated LDO Enables Single-Supply Operation
  • Low Power Reference Buffer with No Droop
  • Excellent AC and DC Performance:
    • SNR: 96.8-dB, THD: –125-dB
    • INL: ±0.25-LSB
    • DNL: ±0.2-LSB, 16-Bit No-Missing-Codes
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5-V to 5-V
  • Single-Supply, Low-Power Operation
  • Enhanced-SPI Digital Interface
    • Interface SCLK: 18-MHz at 1-MSPS
    • Configurable Data Parity Output
  • Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN

The ADS8920B, ADS8922B, and ADS8924B (ADS892xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 16-bit successive approximation register (SAR) based analog-to-digital convertors (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS890xB (20-bit) and ADS891xB (18-bit) resolution variants.

The ADS89xxB boost analog performance while maintaining high-resolution data transfer by using TI’s Enhanced-SPI feature. Enhanced-SPI enables the ADS89xxB to achieve high throughput at lower clock speeds, thereby simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies clocking-in of data, thereby making this device ideal for applications involving FPGAs, DSPs. The ADS89xxB is compatible with a standard SPI Interface.

The ADS89xxB has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The ADS8920B, ADS8922B, and ADS8924B (ADS892xB) belong to a family of pin-to-pin compatible, high-speed, single-channel, high-precision, 16-bit successive approximation register (SAR) based analog-to-digital convertors (ADCs) with an integrated reference buffer and integrated low-dropout regulator (LDO). The device family includes the ADS890xB (20-bit) and ADS891xB (18-bit) resolution variants.

The ADS89xxB boost analog performance while maintaining high-resolution data transfer by using TI’s Enhanced-SPI feature. Enhanced-SPI enables the ADS89xxB to achieve high throughput at lower clock speeds, thereby simplifying the board layout and lowering system cost. Enhanced-SPI also simplifies clocking-in of data, thereby making this device ideal for applications involving FPGAs, DSPs. The ADS89xxB is compatible with a standard SPI Interface.

The ADS89xxB has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Datum
* Data sheet ADS892xB 16-Bit, High-Speed SAR ADCs With Integrated Reference Buffer, and Enhanced Performance Features datasheet (Rev. B) PDF | HTML 08 Aug 2017
Product overview PLC Analog Input Front-End Architectures PDF | HTML 31 Jul 2022
Application note Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs 14 Jun 2018
Application brief Improving Input Settling for Precision Data Converters 12 Dez 2017
Application brief Optimizing Data Transfer on High-Resolution, High-Throughput Data Converters 12 Dez 2017
Application brief Simplify Isolation Designs Using an Enhanced-SPI ADC Interface 11 Dez 2017
White paper Enabling Faster, Smarter, and More Robust Solutions for SAR ADSx With multiSPI 08 Nov 2016

Design und Entwicklung

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Bestellen & Qualität

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  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
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