The ADS4249 is a member of the ADS42xx ultralow-power family of dual-channel, 12-bit and 14-bit analog-to-digital converters (ADCs). Innovative design techniques are used to achieve high dynamic performance, while consuming extremely low power with a 1.8-V supply. This topology makes the ADS4249 well-suited for multi-carrier, wide-bandwidth communications applications.
The ADS4249 has gain options that can be used to improve SFDR performance at lower full-scale input ranges. This device also includes a dc offset correction loop that can be used to cancel the ADC offset. Both DDR LVDS and parallel CMOS digital output interfaces are available in a compact QFN-64 PowerPAD package.
The device includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. The ADS4249 is specified over the industrial temperature range (–40°C to 85°C).
| Top-Dokumentation | Typ | Titel | Format-Optionen | Neueste englische Version herunterladen | Datum |
|---|---|---|---|---|---|
| * | Datenblatt | ADS4249 Dual-Channel, 14-Bit, 250-MSPS Ultralow-Power ADC datasheet (Rev. E) | PDF | HTML | 07.01.2016 | |
| * | Benutzerhandbuch | Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide) | 10.07.2012 | ||
| Anwendungshinweis | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 22.05.2015 | |||
| Anwendungshinweis | Signal Chain Noise Figure Analysis | 29.10.2014 | |||
| Designleitfaden | TSW1265 Dual-Wideband RF-to-Digital Receiver Design Guide | 03.09.2013 | |||
| Anwendungshinweis | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 19.07.2013 | |||
| Benutzerhandbuch | TIDA-00070 Verified Design Reference Guide | 23.01.2013 | |||
| Benutzerhandbuch | HSDC-SEK-10 | 17.01.2013 | |||
| Anwendungshinweis | High-Speed, Analog-to-Digital Converter Basics | 11.01.2012 | |||
| Benutzerhandbuch | TSW3725 Evaluation Module | 25.10.2011 | |||
| Anwendungshinweis | QFN Layout Guidelines | 28.07.2006 |
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The ADS4249EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4249 device, an extremely low power dual channel 14-bit 250 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a (...)
The TSW1265EVM is a wideband dual receiver reference design and evaluation platform. The signal chain allows conversion from RF to bits using a dual-channel downconverter mixer, the LMH6521 dual-channel DVGA, and the ADS4249 14-bit 250-MSPS ADC. The TSW1265EVM also includes the LMK04800 dual-PLL (...)
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The design is for a small cell base station development platform. It provides two real receive paths, two complex transmit paths, and a shared real feedback path. This design has macro basestation performance, but with small cell base station footprint. The current design handles (...)
This reference design and the associated example Verilog code can be used as a starting point for interfacing Altera FPGAs to Texas Instruments' high-speed LVDS-interface analog-to-digital converters (ADC) and digital-to-analog converters (DAC). The firmware implementation is explained and the (...)
For applications where there are bit errors and resulting sample errors (also called sparkle codes, word errors, or code errors), the ability to measure the Error rates caused by these bit errors is important. This FPGA firmware based application note proposes a method to accurately measure these (...)
The TSW1265EVM is an example design of a wideband RF to digital dual receiver solution capable of digitizing up to 125MHz of spectrum. The system provides a reference on how to use the ADS4249, LMH6521, LMK0480x, and a dual mixer to achieve this. This reference EVEM coupled with a capture (...)
| Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
|---|---|---|
| VQFN (RGC) | 64 | Ultra Librarian |
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