GUI für Evaluierungsmodul (EVM)
ADS58C28SPIGUI-SW — ADS42xxx SPI GUI
ADS58C28SPIGUI-SW is the installation package for ADS58C28_ADS42xx_GUI which is used to access or write internal registers of ADS58C28 through an on-board USB port.
ADS4249
Zweikanaliger Analog-zu-Digital-Wandler (ADC), 14 Bit, 250 MSPS
Datenblatt
ADS4249
- Maximum Sample Rate: 250 MSPS
- Ultra-Low Power with Single 1.8-V Supply:
- 560-mW Total Power at 250 MSPS
- High Dynamic Performance:
- 80-dBc SFDR at 170 MHz
- 71.7-dBFS SNR at 170 MHz
- Crosstalk: > 90 dB at 185 MHz
- Programmable Gain up to 6 dB for
SNR/SFDR Trade-off - DC Offset Correction
- Output Interface Options:
- 1.8-V Parallel CMOS Interface
- Double Data Rate (DDR) LVDS with
Programmable Swing:- Standard Swing: 350 mV
- Low Swing: 200 mV
- Supports Low Input Clock Amplitude
Down to 200 mVPP - Package: 9-mm × 9-mm, 64-Pin Quad Flat No-
Lead (QFN) Package
The ADS4249 is a member of the ADS42xx ultralow-power family of dual-channel, 12-bit and 14-bit analog-to-digital converters (ADCs). Innovative design techniques are used to achieve high dynamic performance, while consuming extremely low power with a 1.8-V supply. This topology makes the ADS4249 well-suited for multi-carrier, wide-bandwidth communications applications.
The ADS4249 has gain options that can be used to improve SFDR performance at lower full-scale input ranges. This device also includes a dc offset correction loop that can be used to cancel the ADC offset. Both DDR LVDS and parallel CMOS digital output interfaces are available in a compact QFN-64 PowerPAD package.
The device includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. The ADS4249 is specified over the industrial temperature range (–40°C to 85°C).
Technische Dokumentation
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Alle anzeigen 11 | Top-Dokumentation | Typ | Titel | Format-Optionen | Datum |
|---|---|---|---|---|
| * | Data sheet | ADS4249 Dual-Channel, 14-Bit, 250-MSPS Ultralow-Power ADC datasheet (Rev. E) | PDF | HTML | 07 Jan 2016 |
| Application note | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 22 Mai 2015 | ||
| Application note | Signal Chain Noise Figure Analysis | 29 Okt 2014 | ||
| Design guide | TSW1265 Dual-Wideband RF-to-Digital Receiver Design Guide | 03 Sep 2013 | ||
| Application note | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 19 Jul 2013 | ||
| User guide | TIDA-00070 Verified Design Reference Guide | 23 Jan 2013 | ||
| User guide | HSDC-SEK-10 | 17 Jan 2013 | ||
| User guide | Interfacing Altera FPGAs to ADS4249 and DAC3482 (TIDA-00069 Reference Guide) | 10 Jul 2012 | ||
| Application note | High-Speed, Analog-to-Digital Converter Basics | 11 Jan 2012 | ||
| User guide | TSW3725 Evaluation Module | 25 Okt 2011 | ||
| Application note | QFN Layout Guidelines | 28 Jul 2006 |
Design und Entwicklung
Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.
Evaluierungsplatine
ADS4249EVM — ADS4249 Zweikanal, 14 Bit, 250 MSPS, Analog-zu-Digital-Wandler – Evaluierungsmodul
The ADS4249EVM is a circuit board that allows designers to evaluate the performance of Texas Instruments‘ ADS4249 device, an extremely low power dual channel 14-bit 250 MSPS analog to digital converter. The ADC features a configurable parallel DDR LVDS or CMOS outputs. The EVM provides a (...)
Benutzerhandbuch: PDF
Evaluierungsplatine
TSW1265EVM — Referenzdesign und Evaluierungsplattform für Breitband-Zweifach-Empfänger
The TSW1265EVM is a wideband dual receiver reference design and evaluation platform. The signal chain allows conversion from RF to bits using a dual-channel downconverter mixer, the LMH6521 dual-channel DVGA, and the ADS4249 14-bit 250-MSPS ADC. The TSW1265EVM also includes the LMK04800 dual-PLL (...)
Benutzerhandbuch: PDF
GUI für Evaluierungsmodul (EVM)
DATACONVERTERPRO-SW — High Speed Data Converter Pro GUI Installer, v5.31
This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)
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Berechnungstool
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
Unterstützte Produkte und Hardware
Designtool
SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)
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Simulationstool
PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool
PSpice® für TI ist eine Design- und Simulationsumgebung, welche Sie dabei unterstützt, die Funktionalität analoger Schaltungen zu evaluieren. Diese Design- und Simulationssuite mit vollem Funktionsumfang verwendet eine analoge Analyse-Engine von Cadence®. PSpice für TI ist kostenlos erhältlich und (...)
Referenzdesigns
TIDA-00073 — Dual-Breitband-HF-zu-Digital-Empfänger-Design
The TSW1265EVM is an example design of a wideband RF to digital dual receiver solution capable of digitizing up to 125MHz of spectrum. The system provides a reference on how to use the ADS4249, LMH6521, LMK0480x, and a dual mixer to achieve this. This reference EVEM coupled with a capture (...)
Referenzdesigns
TIDA-00070 — FPGA-Firmware-Projekt zur Messung von Bit-Fehlern im Output Word eines A-zu-D-Wandlers
For applications where there are bit errors and resulting sample errors (also called sparkle codes, word errors, or code errors), the ability to measure the Error rates caused by these bit errors is important. This FPGA firmware based application note proposes a method to accurately measure these (...)
Referenzdesigns
TIDA-00069 — FPGA-Firmware-Beispiel zum Anbinden von Altera-FPGAs an Highspeed-Datenwandler mit LVDS-Schnittstell
This reference design and the associated example Verilog code can be used as a starting point for interfacing Altera FPGAs to Texas Instruments' high-speed LVDS-interface analog-to-digital converters (ADC) and digital-to-analog converters (DAC). The firmware implementation is explained and the (...)
Referenzdesigns
TIDA-00068 — Basisstation-Transceiver mit DPD-Rückkopplungspfad
The design is for a small cell base station development platform. It provides two real receive paths, two complex transmit paths, and a shared real feedback path. This design has macro basestation performance, but with small cell base station footprint. The current design handles (...)
Schaltplan: PDF
| Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
|---|---|---|
| VQFN (RGC) | 64 | Ultra Librarian |
Bestellen & Qualität
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- REACH
- Bausteinkennzeichnung
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- MSL-Rating / Spitzenrückfluss
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- Materialinhalt
- Qualifikationszusammenfassung
- Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
- Werksstandort
- Montagestandort
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Support und Schulungen
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