Produktdetails

Resolution (Bits) 16 Sample rate (max) (ksps) 1000 Number of input channels 1 Interface type SPI Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Rating Catalog TI functional safety category Functional Safety-Capable Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features 50/60 Hz Rejection, Daisy-Chainable, Oscillator, Small Size, Wideband Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 3.3 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 97.2 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
Resolution (Bits) 16 Sample rate (max) (ksps) 1000 Number of input channels 1 Interface type SPI Architecture Delta-Sigma Input type Differential, Pseudo-Differential, Single-ended Rating Catalog TI functional safety category Functional Safety-Capable Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features 50/60 Hz Rejection, Daisy-Chainable, Oscillator, Small Size, Wideband Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 3.3 Analog supply voltage (min) (V) 2.85 Analog supply voltage (max) (V) 5.5 SNR (dB) 97.2 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
WQFN (RUK) 20 9 mm² 3 x 3
  • Programmable data rate:
    • Up to 400 kSPS (wideband filter)
    • Up to 1.067 MSPS (low-latency filter)
  • Selectable digital filter:
    • Wideband or low-latency
  • AC accuracy with dc precision:
    • Dynamic range: 97.5 dB (200 kSPS), typical
    • THD: –110 dB, typical
    • INL: 0.5 LSB, typical
    • Offset drift: 50 nV/°C, typical
    • Gain drift: 0.6 ppm/°C, typical
  • Power-scalable architecture:
    • High-speed mode: 400 kSPS, 18.6 mW
    • Low-speed mode: 50 kSPS, 3.3 mW
  • Input and reference precharge buffers
  • Internal or external clock
  • Functional Safety-Capable
  • Programmable data rate:
    • Up to 400 kSPS (wideband filter)
    • Up to 1.067 MSPS (low-latency filter)
  • Selectable digital filter:
    • Wideband or low-latency
  • AC accuracy with dc precision:
    • Dynamic range: 97.5 dB (200 kSPS), typical
    • THD: –110 dB, typical
    • INL: 0.5 LSB, typical
    • Offset drift: 50 nV/°C, typical
    • Gain drift: 0.6 ppm/°C, typical
  • Power-scalable architecture:
    • High-speed mode: 400 kSPS, 18.6 mW
    • Low-speed mode: 50 kSPS, 3.3 mW
  • Input and reference precharge buffers
  • Internal or external clock
  • Functional Safety-Capable

The ADS117L11 is a 16-bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 400 kSPS using the wideband filter and up to 1067 kSPS using the low-latency filter. The device offers an excellent combination of ac performance and dc precision with low power consumption (18.6 mW in high-speed mode).

The device integrates input and reference buffers to reduce signal loading. The low-drift modulator achieves excellent dc precision with low in-band noise for outstanding ac performance. The power-scalable architecture provides two speed modes to optimize data rate, resolution, and power consumption.

The digital filter is configurable for wideband or low-latency operation, optimizing ac performance or data throughput for dc signals, all in one device.

The serial interface features daisy-chain capability to reduce the SPI I/O over an isolation barrier. Input and output data and register settings are validated by a cyclic-redundancy check (CRC) feature to enhance operational reliability.

The small 3-mm × 3-mm WQFN package is designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.

The ADS117L11 is a 16-bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 400 kSPS using the wideband filter and up to 1067 kSPS using the low-latency filter. The device offers an excellent combination of ac performance and dc precision with low power consumption (18.6 mW in high-speed mode).

The device integrates input and reference buffers to reduce signal loading. The low-drift modulator achieves excellent dc precision with low in-band noise for outstanding ac performance. The power-scalable architecture provides two speed modes to optimize data rate, resolution, and power consumption.

The digital filter is configurable for wideband or low-latency operation, optimizing ac performance or data throughput for dc signals, all in one device.

The serial interface features daisy-chain capability to reduce the SPI I/O over an isolation barrier. Input and output data and register settings are validated by a cyclic-redundancy check (CRC) feature to enhance operational reliability.

The small 3-mm × 3-mm WQFN package is designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.

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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Datum
* Data sheet ADS117L11 400-kSPS, Wide-Bandwidth, 16-Bit, Delta-Sigma ADC datasheet (Rev. A) PDF | HTML 03 Okt 2022
Application note Design Considerations for Multiple Wide Bandwidth Delta- Sigma ADCs in Simultaneous-Sampling Systems (Rev. A) PDF | HTML 29 Dez 2025
Functional safety information ADS1x7Lx1x Functional Safety FIT Rate, FMD and Pin FMA (Rev. C) PDF | HTML 26 Sep 2024
Application note Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML 29 Mär 2023
Design guide Four-Channel Synchronous IEPE Vibration Sensor Interface Reference Design PDF | HTML 28 Nov 2022
Application brief THP210 and ADS127L11 Performance 28 Mär 2022

Design und Entwicklung

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Bestellen & Qualität

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  • Blei-Finish/Ball-Material
  • MSL-Rating / Spitzenrückfluss
  • MTBF-/FIT-Schätzungen
  • Materialinhalt
  • Qualifikationszusammenfassung
  • Kontinuierliches Zuverlässigkeitsmonitoring
Beinhaltete Information:
  • Werksstandort
  • Montagestandort

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