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ADS125P08

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16-kanaliger Delta-Sigma-ADC mit integr. Kanalautosequenzierer und FIFO-Puffer, 24 Bit, 1 MSPS

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ADS125P08

AKTIV
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Produktdetails

Resolution (Bits) 24 Sample rate (max) (ksps) 1000 Number of input channels 16 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 3 Features 50/60 Hz Rejection, Daisy-Chainable, GPIO, Oscillator, Small Size, Temp. Sensor Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 24 Analog supply voltage (min) (V) -2.5, 2.85 Analog supply voltage (max) (V) 2.5, 5.5 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
Resolution (Bits) 24 Sample rate (max) (ksps) 1000 Number of input channels 16 Interface type SPI Architecture Delta-Sigma Input type Differential, Single-ended Multichannel configuration Multiplexed Rating Catalog Reference mode External, Internal Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 3 Features 50/60 Hz Rejection, Daisy-Chainable, GPIO, Oscillator, Small Size, Temp. Sensor Operating temperature range (°C) -40 to 125 Power consumption (typ) (mW) 24 Analog supply voltage (min) (V) -2.5, 2.85 Analog supply voltage (max) (V) 2.5, 5.5 Digital supply (min) (V) 1.65 Digital supply (max) (V) 5.5
VQFN (RHB) 36 25 mm² (5 mm × 5 mm)
  • Programmable data rate up to 1.067MSPS
  • Analog multiplexer with 17 independently selectable inputs:
    • Up to 8 fully differential inputs
    • Up to 16 single ended inputs
  • Rail-to-rail analog input buffer and reference buffer
  • Internal voltage reference, selectable output 2.5V or 4.096V
  • Fault detection and monitor circuits
  • General-Purpose I/Os
  • Internal Oscillator: 25.6MHz, 1% Accuracy
  • Channel auto-sequencer and FIFO buffer
  • Simultaneous 50Hz and 60Hz rejection at ≤ 25 SPS with low-latency digital filter
  • Power-scalable architecture with four speed modes
  • Programmable data rate up to 1.067MSPS
  • Analog multiplexer with 17 independently selectable inputs:
    • Up to 8 fully differential inputs
    • Up to 16 single ended inputs
  • Rail-to-rail analog input buffer and reference buffer
  • Internal voltage reference, selectable output 2.5V or 4.096V
  • Fault detection and monitor circuits
  • General-Purpose I/Os
  • Internal Oscillator: 25.6MHz, 1% Accuracy
  • Channel auto-sequencer and FIFO buffer
  • Simultaneous 50Hz and 60Hz rejection at ≤ 25 SPS with low-latency digital filter
  • Power-scalable architecture with four speed modes

The ADS125P08 is a multiplexed 8/16-Channel, 24 bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 1MSPS and is configurable to accept up to 8 fully differential analog inputs or up to 16 single-ended analog inputs. The device offers an excellent combination of ac performance and dc precision with low power consumption.

The device integrates high-impedance input and reference buffers to reduce signal loading. The ADS125P08 is equipped with a channel auto-sequencer and a FIFO (first-in, first-out) buffer. The power-scalable architecture provides four speed modes to optimize data rate, resolution, and power consumption.

Input and output data and register settings are validated by a cyclic-redundancy check (CRC) feature to enhance operational reliability.

The small 5mm × 5mm VQFN package is designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.

The ADS125P08 is a multiplexed 8/16-Channel, 24 bit, delta-sigma (ΔΣ), analog-to-digital converter (ADC) with data rates up to 1MSPS and is configurable to accept up to 8 fully differential analog inputs or up to 16 single-ended analog inputs. The device offers an excellent combination of ac performance and dc precision with low power consumption.

The device integrates high-impedance input and reference buffers to reduce signal loading. The ADS125P08 is equipped with a channel auto-sequencer and a FIFO (first-in, first-out) buffer. The power-scalable architecture provides four speed modes to optimize data rate, resolution, and power consumption.

Input and output data and register settings are validated by a cyclic-redundancy check (CRC) feature to enhance operational reliability.

The small 5mm × 5mm VQFN package is designed for limited space applications. The device is fully specified for operation over the –40°C to +125°C temperature range.
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Technische Dokumentation

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Top-Dokumentation Typ Titel Format-Optionen Neueste englische Version herunterladen Datum
* Datenblatt ADS125P08 8/16-Channel, 1MSPS , 24 -Bit, Delta-Sigma ADC datasheet PDF | HTML 18.12.2025
Circuit design 4-Ch, diff. in., DAQ front-end circuit w/ configurable voltage & current inputs (Rev. A) PDF | HTML 19.09.2024
Anwendungshinweis Calculating Conversion Latency and System Cycle Time for Delta-Sigma ADCs (Rev. A) PDF | HTML 18.03.2024
Anwendungshinweis Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML 29.03.2023
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Design und Entwicklung

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Evaluierungsplatine

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Support-Software

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