LMK00304
This product has been released to the market and is available for purchase. For some products, newer alternatives may be available.
3.1-GHz Differential Clock Buffer/Level Translator

 

Models (1)

Title Category Type Date
LMK00304 IBIS Model (Rev. A) IBIS Model ZIP 05 Feb 2014

Design kits & evaluation modules (1)

Name Part# Type
LMK00304 Evaluation Board LMK00304EVM Evaluation Modules & Boards

Reference designs

Reference design synchronizing data converter DDC and NCO features for multi-channel RF systems

This reference design provides the solution for synchronization design challenges associated with emerging 5G adapted applications like massive multiple input multiple output (mMIMO), phase array RADAR and communication payload. The typical RF front end contains antenna, low noise amplifier (LNA (...)

View the Important Notice for reference designs covering authorized use, intellectual property matters and disclaimers.

Software (1)

Name Part# Type
Clock Design Tool - Loop Filter & Device Configuration + Simulation CLOCKDESIGNTOOL Application Software & Frameworks

CAD/CAE symbols

Part# Package | Pins CAD File (.bxl) STEP Model (.stp)
LMK00304 Download Download

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